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KSZ9131RNXI: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources

Ray ·b30093a546 ·2mo ago ·parent a02930c
2 files changed +1519
KSZ9131RNXI.adom-lbr.jsonadded+1274
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KSZ9131RNXI.lbradded+245
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rot="R180"/>+  <pin name="RX_CTL/~{CLK125_EN}" x="17.78" y="-6.35" length="short" direction="io" rot="R180"/>+  <pin name="MDC" x="-17.78" y="1.27" length="short" direction="in"/>+  <pin name="MDIO" x="-17.78" y="-1.27" length="short" direction="io"/>+  <pin name="RESET_N" x="17.78" y="1.27" length="short" direction="in" rot="R180"/>+  <pin name="INT_N/PME_N2/~{ALLPHYAD}" x="17.78" y="-1.27" length="short" direction="oc" rot="R180"/>+  <pin name="XI" x="-17.78" y="2.54" length="short" direction="in"/>+  <pin name="XO" x="-17.78" y="0" length="short" direction="out"/>+  <pin name="CLK125_NDO/~{LED_MODE}" x="17.78" y="2.54" length="short" direction="io" rot="R180"/>+  <pin name="LED1/PME_N1/~{PHYAD0}" x="17.78" y="0" length="short" direction="io" rot="R180"/>+  <pin name="LED2/~{PHYAD1}" x="17.78" y="-2.54" length="short" direction="io" rot="R180"/>+  <pin name="NC_1" x="-17.78" y="2.54" length="short" direction="io"/>+  <pin name="NC_2" x="-17.78" y="0" length="short" direction="io"/>+  <pin name="NC_3" x="-17.78" y="-2.54" length="short" direction="io"/>+  <text x="-14.24" y="13.97" size="0.762" layer="94" font="vector" ratio="15">POWER / GROUND</text>+  <text x="-14.24" y="11.43" size="0.762" layer="94" font="vector" ratio="15">1000BASE-T MDI</text>+  <text x="-14.24" y="8.89" size="0.762" layer="94" font="vector" ratio="15">RGMII / MAC</text>+  <text x="-14.24" y="3.81" size="0.762" layer="94" font="vector" ratio="15">MANAGEMENT</text>+  <text x="-14.24" y="5.08" size="0.762" layer="94" font="vector" ratio="15">CLOCK / LED / STRAPS</text>+  <text x="-14.24" y="5.08" size="0.762" layer="94" font="vector" ratio="15">NO CONNECT</text>+</symbol>+</symbols>+<devicesets>+<deviceset name="KSZ9131RNXI" prefix="U">+  <description>Microchip KSZ9131RNXI 10/100/1000BASE-T Gigabit Ethernet PHY, RGMII MAC interface, industrial temp, VQFN-48 7x7mm</description>+  <gates>+    <gate name="G$1" symbol="KSZ9131RNXI" x="0" y="0"/>+  </gates>+  <devices>+    <device name="" package="KSZ9131RNXI">+      <connects>+        <connect gate="G$1" pin="AVDDH_1" pad="1"/>+        <connect gate="G$1" pin="AVDDH_2" pad="12"/>+        <connect gate="G$1" pin="AVDDL_1" pad="4"/>+        <connect gate="G$1" pin="AVDDL_2" pad="9"/>+        <connect gate="G$1" pin="AVDDL_PLL" pad="44"/>+        <connect gate="G$1" pin="LDO_O" pad="43"/>+        <connect gate="G$1" pin="DVDDH_1" pad="16"/>+        <connect gate="G$1" pin="DVDDH_2" pad="34"/>+        <connect gate="G$1" pin="DVDDH_3" pad="40"/>+        <connect gate="G$1" pin="DVDDL_1" pad="18"/>+        <connect gate="G$1" pin="DVDDL_2" pad="23"/>+        <connect gate="G$1" pin="DVDDL_3" pad="26"/>+        <connect gate="G$1" pin="DVDDL_4" pad="30"/>+        <connect gate="G$1" pin="DVDDL_5" pad="39"/>+        <connect gate="G$1" pin="VSS" pad="29"/>+        <connect gate="G$1" pin="P_VSS" pad="49"/>+        <connect gate="G$1" pin="TXRXP_A" pad="2"/>+        <connect gate="G$1" pin="TXRXM_A" pad="3"/>+        <connect gate="G$1" pin="TXRXP_B" pad="5"/>+        <connect gate="G$1" pin="TXRXM_B" pad="6"/>+        <connect gate="G$1" pin="TXRXP_C" pad="7"/>+        <connect gate="G$1" pin="TXRXM_C" pad="8"/>+        <connect gate="G$1" pin="TXRXP_D" pad="10"/>+        <connect gate="G$1" pin="TXRXM_D" pad="11"/>+        <connect gate="G$1" pin="ISET" pad="48"/>+        <connect gate="G$1" pin="TXD0" pad="19"/>+        <connect gate="G$1" pin="TXD1" pad="20"/>+        <connect gate="G$1" pin="TXD2" pad="21"/>+        <connect gate="G$1" pin="TXD3" pad="22"/>+        <connect gate="G$1" pin="TXC" pad="24"/>+        <connect gate="G$1" pin="TX_CTL" pad="25"/>+        <connect gate="G$1" pin="RXD0/~{MODE0}" pad="32"/>+        <connect gate="G$1" pin="RXD1/~{MODE1}" pad="31"/>+        <connect gate="G$1" pin="RXD2/~{MODE2}" pad="28"/>+        <connect gate="G$1" pin="RXD3/~{MODE3}" pad="27"/>+        <connect gate="G$1" pin="RXC/~{PHYAD2}" pad="35"/>+        <connect gate="G$1" pin="RX_CTL/~{CLK125_EN}" pad="33"/>+        <connect gate="G$1" pin="MDC" pad="36"/>+        <connect gate="G$1" pin="MDIO" pad="37"/>+        <connect gate="G$1" pin="RESET_N" pad="42"/>+        <connect gate="G$1" pin="INT_N/PME_N2/~{ALLPHYAD}" pad="38"/>+        <connect gate="G$1" pin="XI" pad="46"/>+        <connect gate="G$1" pin="XO" pad="45"/>+        <connect gate="G$1" pin="CLK125_NDO/~{LED_MODE}" pad="41"/>+        <connect gate="G$1" pin="LED1/PME_N1/~{PHYAD0}" pad="17"/>+        <connect gate="G$1" pin="LED2/~{PHYAD1}" pad="15"/>+        <connect gate="G$1" pin="NC_1" pad="13"/>+        <connect gate="G$1" pin="NC_2" pad="14"/>+        <connect gate="G$1" pin="NC_3" pad="47"/>+      </connects>+      <technologies><technology name=""/></technologies>+    </device>+  </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>\ No newline at end of file