component
KSZ9031RNXIC-TR
Public Made by Adomby adom
Microchip Tech Ethernet Transceivers, QFN-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownKSZ9031RNXIC-TR
Microchip Tech · Ethernet Transceivers · QFN-48(7x7)
KSZ9031RNXIC-TR from Microchip Tech, in a QFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDDH | power_in | 3.3V or 2.5V analog VDD supply (commercial temperature only) |
| 2 | TXRXP_A | bidirectional | Media Dependent Interface pair 0 positive differential signal for 1000BASE-T or 10/100BASE-TX transmit/receive |
| 3 | TXRXM_A | bidirectional | Media Dependent Interface pair 0 negative differential signal for 1000BASE-T or 10/100BASE-TX transmit/receive |
| 4 | AVDDL | power_in | 1.2V analog VDD supply |
| 5 | TXRXP_B | bidirectional | Media Dependent Interface pair 1 positive differential signal for 1000BASE-T or 10/100BASE-TX receive/transmit |
| 6 | TXRXM_B | bidirectional | Media Dependent Interface pair 1 negative differential signal for 1000BASE-T or 10/100BASE-TX receive/transmit |
| 7 | TXRXP_C | bidirectional | Media Dependent Interface pair 2 positive differential signal for 1000BASE-T only |
| 8 | TXRXM_C | bidirectional | Media Dependent Interface pair 2 negative differential signal for 1000BASE-T only |
| 9 | AVDDL | power_in | 1.2V analog VDD supply |
| 10 | TXRXP_D | bidirectional | Media Dependent Interface pair 3 positive differential signal for 1000BASE-T only |
| 11 | TXRXM_D | bidirectional | Media Dependent Interface pair 3 negative differential signal for 1000BASE-T only |
| 12 | AVDDH | power_in | 3.3V or 2.5V analog VDD supply (commercial temperature only) |
| 13 | NC | unconnected | No connect; not bonded but can be connected to digital ground for KSZ9021RN footprint compatibility |
| 14 | DVDDL | power_in | 1.2V digital core VDD supply |
| 15 | LED2/PHYAD1 | bidirectional | LED2 output for link status indication; PHY address bit 1 configuration strap-in during power-up/reset |
| 16 | DVDDH | power_in | 3.3V, 2.5V, or 1.8V digital I/O VDD supply |
| 17 | LED1/PHYAD0/PME_N1 | bidirectional | LED1 output for activity indication; PHY address bit 0 strap-in; optional PME output (requires 1-4.7kΩ pull-up) |
| 18 | DVDDL | power_in | 1.2V digital core VDD supply |
| 19 | TXD0 | input | RGMII transmit data bit 0 input |
| 20 | TXD1 | input | RGMII transmit data bit 1 input |
| 21 | TXD2 | input | RGMII transmit data bit 2 input |
| 22 | TXD3 | input | RGMII transmit data bit 3 input |
| 23 | DVDDL | power_in | 1.2V digital core VDD supply |
| 24 | GTX_CLK | input | RGMII transmit reference clock input (125/25/2.5MHz for 1000/100/10Mbps) |
| 25 | TX_EN | input | RGMII transmit control input |
| 26 | DVDDL | power_in | 1.2V digital core VDD supply |
| 27 | RXD3/MODE3 | bidirectional | RGMII receive data bit 3 output; MODE[3] configuration strap-in during power-up/reset |
| 28 | RXD2/MODE2 | bidirectional | RGMII receive data bit 2 output; MODE[2] configuration strap-in during power-up/reset |
| 29 | VSS | power_in | Digital ground |
| 30 | DVDDL | power_in | 1.2V digital core VDD supply |
| 31 | RXD1/MODE1 | bidirectional | RGMII receive data bit 1 output; MODE[1] configuration strap-in during power-up/reset |
| 32 | RXD0/MODE0 | bidirectional | RGMII receive data bit 0 output; MODE[0] configuration strap-in during power-up/reset |
| 33 | RX_DV/CLK125_EN | bidirectional | RGMII receive control output; CLK125_EN 125MHz clock enable strap-in during power-up/reset |
| 34 | DVDDH | power_in | 3.3V, 2.5V, or 1.8V digital I/O VDD supply |
| 35 | RX_CLK/PHYAD2 | bidirectional | RGMII receive reference clock output (125/25/2.5MHz for 1000/100/10Mbps); PHY address bit 2 strap-in during reset |
| 36 | MDC | input | Management data clock input with internal pull-up |
| 37 | MDIO | bidirectional | Management data input/output with internal pull-up during reset; requires external 1-4.7kΩ pull-up to DVDDH |
| 38 | INT_N/PME_N2 | output | Interrupt output (active low default) and optional programmable PME output (requires 1-4.7kΩ pull-up) |
| 39 | DVDDL | power_in | 1.2V digital core VDD supply |
| 40 | DVDDH | power_in | 3.3V, 2.5V, or 1.8V digital I/O VDD supply |
| 41 | CLK125_NDO/LED_MODE | bidirectional | 125MHz reference clock output for MAC; LED_MODE configuration strap-in (1=single-LED, 0=tri-color dual-LED) during reset |
| 42 | RESET_N | input | Active low hardware reset input with internal pull-up; hardware configurations latched on rising edge de-assertion |
| 43 | LDO_O | output | On-chip 1.2V LDO controller gate drive output for P-channel MOSFET; do not drive externally |
| 44 | AVDDL_PLL | power_in | 1.2V analog VDD supply for PLL |
| 45 | XO | output | 25MHz crystal oscillator feedback output; no connect if external oscillator used |
| 46 | XI | input | 25MHz crystal oscillator or external clock input (±50ppm tolerance, minimum 2.5V peak-to-peak swing) |
| 47 | NC | unconnected | No connect; not bonded but can be connected to AVDDH for KSZ9021RN footprint compatibility |
| 48 | ISET | bidirectional | Transmit output level setting; connect 12.1kΩ ±1% resistor to ground |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-48(7x7) |
| Category | Interface |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
KSZ9031RNXIC-TR - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: QFN-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
ksz9031rnxic-tr-etched.step/ksz9031rnxic-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ksz9031rnxic-tr.step/ksz9031rnxic-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (79 pp, sha256
f7c402264e7b9b65, retrieved 2026-09-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).