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Contents

Pinout
Key specifications
Electrical characteristics
CAD (KiCad official)
Provenance

README

markdown

KSZ9031RNXIA

Microchip Tech · Ethernet ICs · QFN-48(7x7)

KSZ9031RNXIA from Microchip Tech, in a QFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	AVDDH	power_in	Transceiver analog supply, 3.3V or 2.5V (commercial temperature only).
2	TXRXP_A	bidirectional	Media Dependent Interface pair 0 positive signal; carries BI_DA+ in 1000BASE-T MDI mode and TX+/RX+ in 10/100 mode.
3	TXRXM_A	bidirectional	Media Dependent Interface pair 0 negative signal; carries BI_DA- in 1000BASE-T MDI mode and TX-/RX- in 10/100 mode.
4	AVDDL	power_in	1.2V analog core supply.
5	TXRXP_B	bidirectional	Media Dependent Interface pair 1 positive signal; carries BI_DB+ in 1000BASE-T MDI mode and RX+/TX+ in 10/100 mode.
6	TXRXM_B	bidirectional	Media Dependent Interface pair 1 negative signal; carries BI_DB- in 1000BASE-T MDI mode and RX-/TX- in 10/100 mode.
7	TXRXP_C	bidirectional	Media Dependent Interface pair 2 positive signal used in 1000BASE-T mode only; not used in 10/100 mode.
8	TXRXM_C	bidirectional	Media Dependent Interface pair 2 negative signal used in 1000BASE-T mode only; not used in 10/100 mode.
9	AVDDL	power_in	1.2V analog core supply.
10	TXRXP_D	bidirectional	Media Dependent Interface pair 3 positive signal used in 1000BASE-T mode only; not used in 10/100 mode.
11	TXRXM_D	bidirectional	Media Dependent Interface pair 3 negative signal used in 1000BASE-T mode only; not used in 10/100 mode.
12	AVDDH	power_in	Transceiver analog supply, 3.3V or 2.5V (commercial temperature only).
13	NC	unconnected	Not bonded; may be connected to digital ground for footprint compatibility with the KSZ9021RN.
14	DVDDL	power_in	1.2V digital core supply.
15	LED2/PHYAD1	bidirectional	Programmable LED2 output; latched as PHYAD[1] during power-up or reset.
16	DVDDH	power_in	Digital I/O supply, 3.3V, 2.5V, or 1.8V.
17	LED1/PHYAD0/PME_N1	bidirectional	Programmable LED1 output; latched as PHYAD[0] during power-up or reset; alternate function PME_N1 wake-on-LAN output requiring a 1.0 kΩ to 4.7 kΩ pull-up to DVDDH.
18	DVDDL	power_in	1.2V digital core supply.
19	TXD0	input	RGMII transmit data bit 0 input from the MAC.
20	TXD1	input	RGMII transmit data bit 1 input from the MAC.
21	TXD2	input	RGMII transmit data bit 2 input from the MAC.
22	TXD3	input	RGMII transmit data bit 3 input from the MAC.
23	DVDDL	power_in	1.2V digital core supply.
24	GTX_CLK	input	RGMII transmit reference clock input (TXC) from the MAC; 125 MHz for 1000 Mbps.
25	TX_EN	input	RGMII transmit control input (TX_CTL) from the MAC.
26	DVDDL	power_in	1.2V digital core supply.
27	RXD3/MODE3	bidirectional	RGMII receive data bit 3 output to the MAC; MODE3 strap latched at power-up or reset.
28	RXD2/MODE2	bidirectional	RGMII receive data bit 2 output to the MAC; MODE2 strap latched at power-up or reset.
29	VSS	power_in	Digital ground.
30	DVDDL	power_in	1.2V digital core supply.
31	RXD1/MODE1	bidirectional	RGMII receive data bit 1 output to the MAC; MODE1 strap latched at power-up or reset.
32	RXD0/MODE0	bidirectional	RGMII receive data bit 0 output to the MAC; MODE0 strap latched at power-up or reset.
33	RX_DV/CLK125_EN	bidirectional	RGMII receive control output (RX_CTL) to the MAC; CLK125_EN strap latched at power-up or reset.
34	DVDDH	power_in	Digital I/O supply, 3.3V, 2.5V, or 1.8V.
35	RX_CLK/PHYAD2	bidirectional	RGMII receive reference clock output (RXC) to the MAC; PHYAD[2] strap latched at power-up or reset.
36	MDC	input	Management data clock input for MDIO.
37	MDIO	bidirectional	Management data input/output, synchronous to MDC; requires a 1.0 kΩ to 4.7 kΩ pull-up to DVDDH.
38	INT_N/PME_N2	output	Interrupt output, active low by default; alternate PME_N2 wake-on-LAN output requiring a 1.0 kΩ to 4.7 kΩ pull-up to DVDDH.
39	DVDDL	power_in	1.2V digital core supply.
40	DVDDH	power_in	Digital I/O supply, 3.3V, 2.5V, or 1.8V.
41	CLK125_NDO/LED_MODE	bidirectional	125 MHz reference clock output for the MAC; LED_MODE strap latched at power-up or reset.
42	RESET_N	input	Chip reset, active low; strap pins are latched on the rising edge of RESET_N.
43	LDO_O	output	On-chip 1.2V LDO controller output driving the gate of an external P-channel MOSFET; must never be driven externally.
44	AVDDL_PLL	power_in	1.2V analog supply for the PLL.
45	XO	output	25 MHz crystal feedback; left unconnected when an oscillator or external clock is used.
46	XI	input	25 MHz crystal, oscillator, or external clock input with ±50 ppm tolerance.
47	NC	unconnected	Not bonded; may be connected to AVDDH for footprint compatibility with the KSZ9021RN.
48	ISET	bidirectional	Sets the transmit output level; connect a 12.1 kΩ 1% resistor to ground.
49	P_GND	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	QFN-48(7x7)
Category	Communication Interface Chip/UART/485/232
Pins	49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage, core (DVDDL, AVDDL, AVDDL_PLL)	VIN	-0.5		1.8	V		52
Supply voltage, AVDDH	VIN	-0.5		5	V		52
Supply voltage, DVDDH	VIN	-0.5		5	V		52
Input voltage (all inputs)		-0.5		5	V		52
Output voltage (all outputs)		-0.5		5	V		52
Lead temperature				260	°C	soldering, 10 s	52
Storage temperature	TS	-55		150	°C		52
Supply voltage (DVDDL, AVDDL, AVDDL_PLL)		1.14		1.38	V		52
Supply voltage (AVDDH)		3.135		3.465	V	@ 3.3V	52
Supply voltage (AVDDH)		2.375		2.625	V	@ 2.5V; Commercial temp. only	52
Supply voltage (DVDDH)		3.135		3.465	V	@ 3.3V	52
Supply voltage (DVDDH)		2.375		2.625	V	@ 2.5V	52
Supply voltage (DVDDH)		1.71		1.89	V	@ 1.8V	52
Ambient temperature (TA Industrial: KSZ9031RNXI)	TA	-40		85	°C	TA Industrial: KSZ9031RNXI	52
Maximum junction temperature	TJ max.			125	°C		52
Thermal resistance, junction-to-ambient	ΘJA		36.34		°C/W		52
Thermal resistance, junction-to-case	ΘJC		9.47		°C/W		52

CAD (KiCad official)

Symbol: KSZ9031RNXIA
Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
3D model: QFN-48(7x7) (KiCad packages3D, STEP)
3D model files: ksz9031rnxia-etched.step / ksz9031rnxia-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ksz9031rnxia.step / ksz9031rnxia.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (83 pp, sha256 700e716f1afe7794, retrieved 2026-10-27, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF