component
KSZ9031RNXCC-TR
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Microchip Tech Ethernet Transceivers, QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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Datasheet
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README
markdownKSZ9031RNXCC-TR
Microchip Tech · Ethernet Transceivers · QFN-48-EP(7x7)
KSZ9031RNXCC-TR from Microchip Tech, in a QFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDDH | power_in | 3.3V/2.5V analog VDD for the transceiver, commercial temperature parts only. |
| 2 | TXRXP_A | bidirectional | Media Dependent Interface pair 0 positive signal; BI_DA+ in 1000BASE-T MDI mode and TX+/RX+ in 10/100 modes, depending on MDI or MDI-X configuration. |
| 3 | TXRXM_A | bidirectional | Media Dependent Interface pair 0 negative signal; BI_DA- in 1000BASE-T MDI mode and TX-/RX- in 10/100 modes, depending on MDI or MDI-X configuration. |
| 4 | AVDDL | power_in | 1.2V analog VDD. |
| 5 | TXRXP_B | bidirectional | Media Dependent Interface pair 1 positive signal; BI_DB+ in 1000BASE-T MDI mode and RX+/TX+ in 10/100 modes, depending on MDI or MDI-X configuration. |
| 6 | TXRXM_B | bidirectional | Media Dependent Interface pair 1 negative signal; BI_DB- in 1000BASE-T MDI mode and RX-/TX- in 10/100 modes, depending on MDI or MDI-X configuration. |
| 7 | TXRXP_C | bidirectional | Media Dependent Interface pair 2 positive signal; used in 1000BASE-T mode only and not used in 10/100BASE-T mode. |
| 8 | TXRXM_C | bidirectional | Media Dependent Interface pair 2 negative signal; used in 1000BASE-T mode only and not used in 10/100BASE-T mode. |
| 9 | AVDDL | power_in | 1.2V analog VDD. |
| 10 | TXRXP_D | bidirectional | Media Dependent Interface pair 3 positive signal; used in 1000BASE-T mode only and not used in 10/100BASE-T mode. |
| 11 | TXRXM_D | bidirectional | Media Dependent Interface pair 3 negative signal; used in 1000BASE-T mode only and not used in 10/100BASE-T mode. |
| 12 | AVDDH | power_in | 3.3V/2.5V analog VDD for the transceiver, commercial temperature parts only. |
| 13 | NC | unconnected | Not bonded; may be connected to digital ground for footprint compatibility with the KSZ9021RN. |
| 14 | DVDDL | power_in | 1.2V digital VDD. |
| 15 | LED2/PHYAD1 | bidirectional | Programmable LED2 output; in config mode the pull-up/pull-down value is latched as PHYAD[1] at power-up/reset. |
| 16 | DVDDH | power_in | 3.3V, 2.5V, or 1.8V digital VDD_I/O. |
| 17 | LED1/PHYAD0/PME_N1 | bidirectional | Programmable LED1 output; in config mode the voltage is latched as PHYAD[0] at power-up/reset, and as PME_N output (pin option 1) it needs a 1.0 kΩ to 4.7 kΩ pull-up to DVDDH. |
| 18 | DVDDL | power_in | 1.2V digital VDD. |
| 19 | TXD0 | input | RGMII TD0 (transmit data 0) input. |
| 20 | TXD1 | input | RGMII TD1 (transmit data 1) input. |
| 21 | TXD2 | input | RGMII TD2 (transmit data 2) input. |
| 22 | TXD3 | input | RGMII TD3 (transmit data 3) input. |
| 23 | DVDDL | power_in | 1.2V digital VDD. |
| 24 | GTX_CLK | input | RGMII TXC (transmit reference clock) input. |
| 25 | TX_EN | input | RGMII TX_CTL (transmit control) input. |
| 26 | DVDDL | power_in | 1.2V digital VDD. |
| 27 | RXD3/MODE3 | bidirectional | RGMII RD3 (receive data 3) output; in config mode the pull-up/pull-down value is latched as MODE3 at power-up/reset. |
| 28 | RXD2/MODE2 | bidirectional | RGMII RD2 (receive data 2) output; in config mode the pull-up/pull-down value is latched as MODE2 at power-up/reset. |
| 29 | VSS | power_in | Digital ground. |
| 30 | DVDDL | power_in | 1.2V digital VDD. |
| 31 | RXD1/MODE1 | bidirectional | RGMII RD1 (receive data 1) output; in config mode the pull-up/pull-down value is latched as MODE1 at power-up/reset. |
| 32 | RXD0/MODE0 | bidirectional | RGMII RD0 (receive data 0) output; in config mode the pull-up/pull-down value is latched as MODE0 at power-up/reset. |
| 33 | RX_DV/CLK125_EN | bidirectional | RGMII RX_CTL (receive control) output; in config mode latched as CLK125_NDO output enable at power-up/reset. |
| 34 | DVDDH | power_in | 3.3V, 2.5V, or 1.8V digital VDD_I/O. |
| 35 | RX_CLK/PHYAD2 | bidirectional | RGMII RXC (receive reference clock) output; in config mode the pull-up/pull-down value is latched as PHYAD[2] at power-up/reset. |
| 36 | MDC | input | Management data clock input; the reference clock for MDIO (pin 37), with internal pull-up. |
| 37 | MDIO | bidirectional | Management data input/output, synchronous to MDC; requires an external 1.0 kΩ to 4.7 kΩ pull-up to DVDDH. |
| 38 | INT_N/PME_N2 | output | Programmable interrupt output (active low by default, set by Register 1Fh bit 14) or PME_N output (pin option 2); needs a 1.0 kΩ to 4.7 kΩ pull-up to DVDDH for interrupt or PME functions. |
| 39 | DVDDL | power_in | 1.2V digital VDD. |
| 40 | DVDDH | power_in | 3.3V, 2.5V, or 1.8V digital VDD_I/O. |
| 41 | CLK125_NDO/LED_MODE | bidirectional | 125 MHz reference clock output for the MAC; in config mode latched as LED_MODE at power-up/reset (pull-up single-LED mode, pull-down tri-color dual-LED mode). |
| 42 | RESET_N | input | Active-low chip reset with internal pull-up; strap-in pins are latched on the de-assertion (rising edge) of RESET_N. |
| 43 | LDO_O | output | On-chip 1.2V LDO controller output that drives the gate of a P-channel MOSFET for the core; it should never be driven externally and can float if 1.2V is supplied and this pin is unused. |
| 44 | AVDDL_PLL | power_in | 1.2V analog VDD for the PLL. |
| 45 | XO | output | 25 MHz crystal feedback; no connect if an oscillator or external clock source is used. |
| 46 | XI | input | Crystal/oscillator/external clock input; 25 MHz with ±50 ppm tolerance. |
| 47 | NC | unconnected | Not bonded; may be connected to AVDDH power for footprint compatibility with the KSZ9021RN. |
| 48 | ISET | bidirectional | Sets the transmit output level; connect a 12.1 kΩ 1% resistor to ground on this pin. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-48-EP(7x7) |
| Category | Interface |
| Pins | 49 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (DVDDL, AVDDL, AVDDL_PLL) | VIN | 1.14 | 1.38 | V | DVDDL, AVDDL, AVDDL_PLL (core, 1.2V) | 52 | |
| Supply voltage AVDDH @ 3.3V | VIN | 3.135 | 3.465 | V | AVDDH @ 3.3V | 52 | |
| Supply voltage AVDDH @ 2.5V | VIN | 2.375 | 2.625 | V | AVDDH @ 2.5V; Commercial temp. only | 52 | |
| Supply voltage DVDDH @ 3.3V | VIN | 3.135 | 3.465 | V | DVDDH @ 3.3V | 52 | |
| Supply voltage DVDDH @ 2.5V | VIN | 2.375 | 2.625 | V | DVDDH @ 2.5V | 52 | |
| Supply voltage DVDDH @ 1.8V | VIN | 1.71 | 1.89 | V | DVDDH @ 1.8V | 52 | |
| Ambient temperature (commercial KSZ9031RNXC) | TA | 0 | 70 | °C | TA Commercial: KSZ9031RNXC | 52 | |
| Maximum junction temperature | TJ max. | 125 | °C | 52 | |||
| Supply voltage absolute maximum (DVDDL, AVDDL, AVDDL_PLL) | VIN | -0.5 | 1.8 | V | DVDDL, AVDDL, AVDDL_PLL | 52 | |
| Supply voltage absolute maximum AVDDH | VIN | -0.5 | 5 | V | AVDDH | 52 | |
| Supply voltage absolute maximum DVDDH | VIN | -0.5 | 5 | V | DVDDH | 52 | |
| Input voltage (all inputs) | -0.5 | 5 | V | all inputs | 52 | ||
| Output voltage (all outputs) | -0.5 | 5 | V | all outputs | 52 | ||
| Lead temperature (soldering) | 260 | °C | soldering, 10 s | 52 | |||
| Storage temperature | TS | -55 | 150 | °C | 52 | ||
| 25 MHz reference clock frequency tolerance (max.) | -50 | 50 | ppm | 25 MHz crystal/oscillator reference clock, Table 10-1; printed ±50 ppm | 66 | ||
| XI minimum clock VPP swing | VPP | 2.5 | V | XI externally provided clock, direct coupling | 66 | ||
| XI minimum clock VPP swing with capacitive coupling | VPP | 1.5 | V | XI externally provided clock, series capacitive coupling | 66 | ||
| XI maximum clock VPP swing | VPP | 3.3 | V | printed as 3.3V +5%; +5% not computed | 66 | ||
| MDIO external pull-up resistor to DVDDH | 1 | 4.7 | kΩ | MDIO pin, external pull-up to DVDDH | 10 | ||
| INT_N/PME_N external pull-up resistor to DVDDH | 1 | 4.7 | kΩ | Interrupt (active low) and PME functions, external pull-up to DVDDH | 10 | ||
| ISET external resistor to ground | 12.1 | kΩ | Connect to ground on ISET pin to set transmit output level | 11 | |||
| ISET external resistor tolerance | -1 | 1 | % | 1% resistor on ISET | 11 | ||
| 25 MHz crystal series resistance | 40 | Ω | 25 MHz crystal, Table 10-1 | 66 | |||
| Total period jitter (peak-to-peak) | 100 | ps | 25 MHz crystal/reference clock, Table 10-1; printed as <100 ps | 66 | |||
| Thermal resistance junction-to-ambient | ΘJA | 36.34 | °C/W | 52 | |||
| Thermal resistance junction-to-case | ΘJC | 9.47 | °C/W | 52 |
CAD (KiCad official)
- Symbol:
KSZ9031RNXCC-TR - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: QFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
ksz9031rnxcc-tr-etched.step/ksz9031rnxcc-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ksz9031rnxcc-tr.step/ksz9031rnxcc-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (79 pp, sha256
255d9436ffc33b04, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).