component
KSZ8081RNACA-TR
Public Made by Adomby adom
Microchip Ethernet Controllers, QFN-24-EP(4x4). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
50b12ad
11d ago
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{
"schema_version": 1,
"type": "component",
"slug": "ksz8081rnaca-tr",
"title": "KSZ8081RNACA-TR",
"brief": "Microchip Ethernet Controllers, QFN-24-EP(4x4). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"ksz8081rnaca-tr"
],
"component": {
"mpn": "KSZ8081RNACA-TR",
"manufacturer": "Microchip",
"package": "QFN-24-EP(4x4)",
"pin_count": 25,
"category": "Interface",
"subcategory": "Ethernet Controllers",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/86df1a99f29d4713969e50242675f4e1.pdf",
"parts": {
"symbol": "ksz8081rnaca-tr.kicad_sym",
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"model_3d_step": "ksz8081rnaca-tr-etched.step",
"model_3d_step_plain": "ksz8081rnaca-tr.step",
"lbr": "ksz8081rnaca-tr.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "VDD_1.2",
"type": "power_in",
"description": "1.2V core VDD supplied by the on-chip regulator. Decouple with 2.2 uF and 0.1 uF capacitors to ground."
},
{
"number": "2",
"name": "VDDA_3.3",
"type": "power_in",
"description": "3.3V analog VDD supply."
},
{
"number": "3",
"name": "RXM",
"type": "bidirectional",
"description": "Physical Receive or Transmit Signal (negative differential). Media-side MDI/MDI-X pair, on-chip terminated."
},
{
"number": "4",
"name": "RXP",
"type": "bidirectional",
"description": "Physical Receive or Transmit Signal (positive differential). Media-side MDI/MDI-X pair, on-chip terminated."
},
{
"number": "5",
"name": "TXM",
"type": "bidirectional",
"description": "Physical Transmit or Receive Signal (negative differential). Media-side MDI/MDI-X pair, on-chip terminated."
},
{
"number": "6",
"name": "TXP",
"type": "bidirectional",
"description": "Physical Transmit or Receive Signal (positive differential). Media-side MDI/MDI-X pair, on-chip terminated."
},
{
"number": "7",
"name": "XO",
"type": "output",
"description": "Crystal feedback for 25 MHz crystal. Leave as a no-connect if an oscillator or external clock source is used on XI."
},
{
"number": "8",
"name": "XI",
"type": "input",
"description": "25 MHz +/-50 ppm crystal/oscillator/external clock input (RMII 25 MHz mode). KSZ8081RNA power-up default: 25 MHz crystal on this pin. Programmable to 50 MHz mode via PHY Register 1Fh bit [7]."
},
{
"number": "9",
"name": "REXT",
"type": "input",
"description": "PHY transmit output current setting. Connect a 6.49 kOhm 1% resistor from this pin to ground."
},
{
"number": "10",
"name": "MDIO",
"type": "bidirectional",
"description": "Management Interface (MII) data I/O. Open-drain with weak internal pull-up; requires an external 1.0 kOhm pull-up resistor."
},
{
"number": "11",
"name": "MDC",
"type": "input",
"description": "Management Interface (MII) clock input, synchronous to MDIO. Weak internal pull-up."
},
{
"number": "12",
"name": "RXD1",
"type": "output",
"description": "RMII Receive Data Output[1]. Synchronous to the 50 MHz RMII reference clock; two bits sent per clock while CRS_DV is asserted. Internal pull-down active at reset."
},
{
"number": "13",
"name": "RXD0",
"type": "output",
"description": "RMII Receive Data Output[0]. Synchronous to the 50 MHz RMII reference clock; two bits sent per clock while CRS_DV is asserted. Internal pull-up active at reset."
},
{
"number": "14",
"name": "VDDIO",
"type": "power_in",
"description": "Digital I/O supply. Selectable 3.3V, 2.5V, or 1.8V."
},
{
"number": "15",
"name": "CRS_DV/PHYAD[1:0]",
"type": "bidirectional",
"description": "RMII mode: Carrier Sense / Receive Data Valid output to the MAC. Config mode: the pull-up/pull-down value on this pin is latched as PHYAD[1:0] at de-assertion of reset (pull-up = 0x3, pull-down default = 0x0)."
},
{
"number": "16",
"name": "REF_CLK",
"type": "bidirectional",
"description": "RMII 25 MHz mode (RNA default): outputs the 50 MHz RMII reference clock to the MAC. RMII 50 MHz mode: no-connect. Latched pull-down active at reset."
},
{
"number": "17",
"name": "RXER",
"type": "output",
"description": "RMII Receive Error output. Needs a latched pull-down at de-assertion of reset for normal operation; add an external pull-down if the MAC drives this pin high."
},
{
"number": "18",
"name": "INTRP",
"type": "output",
"description": "Programmable interrupt output. Open-drain with weak internal pull-up; requires an external 1.0 kOhm pull-up resistor."
},
{
"number": "19",
"name": "TXEN",
"type": "input",
"description": "RMII Transmit Enable input from the MAC."
},
{
"number": "20",
"name": "TXD0",
"type": "input",
"description": "RMII Transmit Data Input[0] from the MAC. Synchronous to the 50 MHz RMII reference clock while TXEN is asserted."
},
{
"number": "21",
"name": "TXD1",
"type": "bidirectional",
"description": "RMII Transmit Data Input[1] from the MAC. NAND Tree mode: acts as the NAND tree output pin."
},
{
"number": "22",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "23",
"name": "LED0/ANEN_SPEED",
"type": "bidirectional",
"description": "Programmable LED0 output (Link/Activity by default; modes selected via Register 1Fh bits [5:4]). Config mode: latched at de-assertion of reset as auto-negotiation enable (pull-up default = enabled) and speed select (pull-up = 100 Mbps, pull-down = 10 Mbps)."
},
{
"number": "24",
"name": "RST#",
"type": "input",
"description": "Chip reset, active-low. Weak internal pull-up."
},
{
"number": "25",
"name": "PADDLE_GND",
"type": "power_in",
"description": "Exposed paddle on the bottom of the QFN package. Must be soldered to the board ground plane."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/86df1a99f29d4713969e50242675f4e1.pdf",
"pages": 52,
"sha256": "6d02bb0e0b96569f",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 25,
"described": 25,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
}
},
"metadata": {
"specs": {
"Manufacturer": "Microchip",
"Package": "QFN-24-EP(4x4)",
"Category": "Interface",
"Pins": "25"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ksz8081rnaca-tr"
],
"discovery_pitch": "KSZ8081RNACA-TR (Microchip) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
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"files": [
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"docs/hero.png",
"docs/ksz8081rnaca-tr-datasheet.pdf",
"viewers/symbol.html",
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"visibility": {
"public": true
},
"variants": [
{
"mpn": "KSZ8081RNACA-TR",
"kind": "packaging"
},
{
"mpn": "KSZ8081RNDCA-TR",
"kind": "unknown"
}
],
"updated_at": "2026-09-24T23:24:52.826Z"
}