component
KSZ8041RNLI-TR
Public Made by Adomby adom
Microchip Tech Pre-ordered Chips, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ksz8041rnli-tr",
"version": "0.1.0",
"type": "component",
"description": "Microchip Tech Pre-ordered Chips, QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface ics",
"ksz8041rnli-tr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ksz8041rnli-tr.kicad_sym",
"ksz8041rnli-tr.kicad_mod",
"ksz8041rnli-tr.glb",
"ksz8041rnli-tr.step",
"ksz8041rnli-tr.lbr",
"docs/hero.png",
"docs/ksz8041rnli-tr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ksz8041rnli-tr-hero.glb",
"ksz8041rnli-tr-hero.overlay.json",
"ksz8041rnli-tr-etched.glb"
],
"component": {
"mpn": "KSZ8041RNLI-TR",
"manufacturer": "Microchip Tech",
"package": "QFN-32(5x5)",
"pin_count": 33,
"category": "Interface ICs",
"subcategory": "Pre-ordered Chips",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/0fe3f78404a480df0e5b094342e0a863.pdf",
"parts": {
"symbol": "ksz8041rnli-tr.kicad_sym",
"footprint": "ksz8041rnli-tr.kicad_mod",
"model_3d": "ksz8041rnli-tr-hero.glb",
"model_3d_plain": "ksz8041rnli-tr-etched.glb",
"model_3d_step": "ksz8041rnli-tr-etched.step",
"model_3d_step_plain": "ksz8041rnli-tr.step",
"lbr": "ksz8041rnli-tr.lbr"
},
"distributor_links": {
"lcsc": "C2671237",
"digikey": "576-3979-2-ND",
"mouser": "998-KSZ8041RNLITR"
},
"distributor_check": {
"checked_at": "2026-10-29T01:05:26Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "576-3979-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "998-KSZ8041RNLITR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "GND",
"type": "power_in",
"description": "Ground connection for the device."
},
{
"number": "2",
"name": "VDDPLL_1.8",
"type": "power_out",
"description": "1.8V analog VDD from the built-in low-noise regulator, to be decoupled to ground with 1.0 µF and 0.1 µF capacitors."
},
{
"number": "3",
"name": "VDDA_3.3",
"type": "power_in",
"description": "3.3V analog VDD, to be connected to the board's 3.3V supply through a ferrite bead."
},
{
"number": "4",
"name": "RX-",
"type": "bidirectional",
"description": "Physical receive or transmit signal, negative side of the differential pair."
},
{
"number": "5",
"name": "RX+",
"type": "bidirectional",
"description": "Physical receive or transmit signal, positive side of the differential pair."
},
{
"number": "6",
"name": "TX-",
"type": "bidirectional",
"description": "Physical transmit or receive signal, negative side of the differential pair."
},
{
"number": "7",
"name": "TX+",
"type": "bidirectional",
"description": "Physical transmit or receive signal, positive side of the differential pair."
},
{
"number": "8",
"name": "XO",
"type": "output",
"description": "Crystal feedback for a 25-MHz crystal; left unconnected when an oscillator or external clock source is used."
},
{
"number": "9",
"name": "XI",
"type": "input",
"description": "Crystal, oscillator or external clock input at 25 MHz ±50 ppm."
},
{
"number": "10",
"name": "REXT",
"type": "bidirectional",
"description": "Sets the physical transmit output current; connect a 6.49-k resistor in parallel with a 100-pF capacitor to ground on this pin."
},
{
"number": "11",
"name": "MDIO",
"type": "bidirectional",
"description": "Management interface (MII) data I/O, which requires an external 4.7-k pull-up resistor."
},
{
"number": "12",
"name": "MDC",
"type": "input",
"description": "Management interface (MII) clock input, synchronous to the MDIO data interface."
},
{
"number": "13",
"name": "PHYAD0",
"type": "bidirectional",
"description": "Pull-up/pull-down value is latched as PHYADDR[0] during power-up or reset (internal pull-up, 40K ±30%)."
},
{
"number": "14",
"name": "PHYAD1",
"type": "bidirectional",
"description": "Pull-up/pull-down value is latched as PHYADDR[1] during power-up or reset (internal pull-down, 40K ±30%)."
},
{
"number": "15",
"name": "RXD1/PHYAD2",
"type": "bidirectional",
"description": "RMII receive data output bit 1; pull-up/pull-down value is latched as PHYADDR[2] during power-up or reset."
},
{
"number": "16",
"name": "RXD0/DUPLEX",
"type": "bidirectional",
"description": "RMII receive data output bit 0; value is latched as DUPLEX (register 0h, bit 8) during power-up or reset."
},
{
"number": "17",
"name": "VDDIO_3.3",
"type": "power_in",
"description": "3.3V digital VDD, to be connected to the board's 3.3V supply."
},
{
"number": "18",
"name": "CRSDV/CONFIG2",
"type": "bidirectional",
"description": "RMII carrier sense/receive data valid output; pull-up/pull-down value is latched as CONFIG2 during power-up or reset."
},
{
"number": "19",
"name": "REF_CLK",
"type": "output",
"description": "Provides the 50-MHz RMII reference clock output to the MAC."
},
{
"number": "20",
"name": "RXER/RX_ER/ISO",
"type": "bidirectional",
"description": "RMII receive error output; pull-up/pull-down value is latched as ISOLATE during power-up or reset."
},
{
"number": "21",
"name": "INTRP",
"type": "output",
"description": "Programmable interrupt output, active low by default or active high per register 1Fh bit 9, with internal pull-up (40K ±30%)."
},
{
"number": "22",
"name": "NC",
"type": "unconnected",
"description": "No connect."
},
{
"number": "23",
"name": "TX_EN",
"type": "input",
"description": "RMII transmit enable input, asserted when the MAC presents di-bits on TXD[1:0] for transmission."
},
{
"number": "24",
"name": "TXD0",
"type": "input",
"description": "RMII transmit data input bit 0, accepted for transmission only while TX_EN is asserted."
},
{
"number": "25",
"name": "TXD1",
"type": "input",
"description": "RMII transmit data input bit 1, accepted for transmission only while TX_EN is asserted."
},
{
"number": "26",
"name": "NC",
"type": "unconnected",
"description": "No connect."
},
{
"number": "27",
"name": "NC",
"type": "unconnected",
"description": "No connect."
},
{
"number": "28",
"name": "CONFIG0",
"type": "bidirectional",
"description": "Pull-up/pull-down value is latched as CONFIG0 during power-up or reset to select the interface mode."
},
{
"number": "29",
"name": "CONFIG1",
"type": "bidirectional",
"description": "Pull-up/pull-down value is latched as CONFIG1 during power-up or reset to select the interface mode."
},
{
"number": "30",
"name": "LED0/NWAYEN",
"type": "bidirectional",
"description": "Programmable LED0 output; pull-up/pull-down value is latched as auto-negotiation enable (register 0h, bit 12) during power-up or reset."
},
{
"number": "31",
"name": "LED1/SPEED",
"type": "bidirectional",
"description": "Programmable LED1 output; value is latched as SPEED (register 0h, bit 13) during power-up or reset."
},
{
"number": "32",
"name": "RST#",
"type": "input",
"description": "Chip reset, active low."
},
{
"number": "33",
"name": "PADDLE GND",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The MPN KSZ8041RNLI-TR is mapped to the KSZ8041RNL (RMII, 25 MHz crystal, 50 MHz REF_CLK output) pin; The paddle (exposed pad) is labeled 'PADDLE GND' on the package drawing but has no numeric pin numbe; Pin 2 (VDDPLL_1.8) is typed power_out because the datasheet shows it as the output of the integrated",
"exposed pad 33 added from the footprint",
"1/33 pins cited to the wrong page (name found elsewhere): ['9:XI@p12']",
"1/33 pin names appear NOWHERE in the datasheet text: ['8:XO@p12']"
],
"pages_sent": 29,
"cost_usd": 0.1235,
"at": "2026-10-29T01:05:09"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/0fe3f78404a480df0e5b094342e0a863.pdf",
"pages": 58,
"sha256": "e4c760d80fa0cd50",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ksz8041rnli-tr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-29",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ksz8041rnli-tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5.0,
5.0,
0.875
],
"zmin_mm": 0.0,
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"footprint_binding": "identity",
"sha256": "fc6b847dd4ca98222f177b5863660b1ad3d613a13b6382600547edd3e6971d5c",
"checked": "2026-10-29",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}