# KPESD5V0L2UT

**KUU** · ESD And Surge Protection (TVS/ESD) · SOT-23

KPESD5V0L2UT from KUU, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BASE | passive | Pin 1 is labelled BASE in the datasheet pinout, and the datasheet states no function or limit for it. |
| 2 | EMITTER | passive | Pin 2 is labelled EMITTER in the datasheet pinout, and the datasheet states no function or limit for it. |
| 3 | COLLECTOR | passive | Pin 3 is labelled COLLECTOR in the datasheet pinout, and the datasheet states no function or limit for it. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | KUU |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Minimum breakdown voltage | VBR | 6 |  |  | V | @ 1mA | 2 |
| Maximum leakage current | IRM |  |  | 1 | µA | @ VRM | 2 |
| Maximum clamping voltage | VCL |  |  | 9.8 | V | @ 1A, footnote 1: 8/20 waveform used | 2 |
| Maximum clamping voltage | VCL |  |  | 12.5 | V | @ 5A, footnote 1: 8/20 waveform used | 2 |
| Maximum pulse peak current | IPPM |  |  | 17 | A | tp=8/20us | 2 |
| Maximum capacitance | C |  |  | 220 | pF | 0V, 1MHz | 2 |
| Peak pulse power | PPP |  |  | 300 | W | tp = 8/20µs | 1 |
| Maximum lead temperature for soldering | TL |  |  | 260 | °C | during 10s | 1 |
| Storage temperature range | Tstg | -55 |  | 15 | °C |  | 1 |
| Operating temperature range | Top | -40 |  | 125 | °C |  | 1 |
| Maximum junction temperature | Tj |  |  | 150 | °C |  | 1 |

## CAD (KiCad official)

- Symbol: `KPESD5V0L2UT`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `kpesd5v0l2ut-etched.step` / `kpesd5v0l2ut-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `kpesd5v0l2ut.step` / `kpesd5v0l2ut.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [KUU datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757283183694503936) (3 pp, sha256 `734795892d1c91d3`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/kpesd5v0l2ut-datasheet.pdf)