component
KP522201BLGA
Public Made by Adomby adom
Kiwi Instruments DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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KP522201BLGA
Kiwi Instruments · DC-DC Converters · SOT-23-6
KP522201BLGA from Kiwi Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | power_out | Bootstrap supply for the high-side MOSFET gate drive; a 100nF ceramic capacitor must be connected between BST and SW, and BOOT-SW is recommended to stay within -0.1 V to 5.5 V. |
| 2 | GND | power_in | Power and signal ground for the device. |
| 3 | FB | input | Feedback input fed by the resistor divider from VOUT for output voltage setting and control, with VREF = 0.6 V and a recommended range of -0.1 V to 5.5 V. |
| 4 | EN | input | Enable control: pull high or leave floating to enable the device; when connected to VIN a series pull-up resistor of at least 100 kΩ is required, and it also sets the VIN UVLO thresholds, with a recommended range of -0.1 V to 5.5 V. |
| 5 | VIN | power_in | Input supply pin with an operating range of 4.5 V to 17 V, requiring a 100nF ceramic decoupling capacitor placed as close as possible to VIN and GND. |
| 6 | SW | output | Switch node connected to the output inductor through a short, wide trace, with a recommended DC range of -0.1 V to 17 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Kiwi Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN pin voltage | VIN | -0.3 | 19 | V | 3 | ||
| SW pin voltage, DC | -0.3 | 19 | V | DC | 3 | ||
| SW pin voltage, transient | -3 | 21 | V | Transient < 10 ns | 3 | ||
| VIN-SW voltage, DC | -0.3 | 19 | V | DC | 3 | ||
| VIN-SW voltage, transient | -3 | 21 | V | Transient < 10 ns | 3 | ||
| BOOT pin voltage | -0.3 | 25 | V | 3 | |||
| BOOT-SW voltage | -0.3 | 6 | V | 3 | |||
| EN, FB pin voltage | -0.3 | 6 | V | 3 | |||
| Operating junction temperature range | TJ | -40 | 150 | ℃ | 3 | ||
| Storage temperature range | TSTG | -65 | 150 | ℃ | 3 | ||
| ESD human body model | VESD_HBM | -2000 | 2000 | V | Human body model (HBM) | 3 | |
| ESD charged device model | VESD_CDM | -500 | 500 | V | Charged device model (CDM) | 3 | |
| VIN input voltage range | VIN | 4.5 | 17 | V | 3 | ||
| VOUT output voltage range | VOUT | 0.6 | 7 | V | 3 | ||
| IOUT output current range | IOUT | 0 | 2 | A | 3 | ||
| SW pin voltage, DC | -0.1 | 17 | V | DC | 3 | ||
| SW pin voltage, transient | -3 | 19 | V | Transient < 10 ns | 3 | ||
| VIN-SW voltage, DC | -0.1 | 17 | V | DC | 3 | ||
| VIN-SW voltage, transient | -3 | 19 | V | Transient < 10 ns | 4 | ||
| BOOT pin voltage | -0.1 | 22.5 | V | 4 | |||
| BOOT-SW voltage | -0.1 | 5.5 | V | 4 | |||
| EN, FB pin voltage | -0.1 | 5.5 | V | 4 | |||
| Operating junction temperature range | TJ | -40 | 125 | ℃ | 4 | ||
| EN series pull-up resistor when EN tied to VIN | 100 | kΩ | Required when EN is connected directly to VIN | 4 | |||
| VIN operating input voltage | 4.5 | 17 | V | 4 | |||
| VIN shutdown current | ISHDN(VIN) | 2.5 | 4.5 | µA | VIN = 12 V, VEN = 0 V | 4 | |
| VIN UVLO rising threshold | VUVLO(R) | 4 | 4.2 | 4.4 | V | VIN rising | 4 |
| VIN UVLO falling threshold | VUVLO(F) | 3.6 | 3.8 | 4 | V | VIN falling | 4 |
| EN rising threshold | VEN(R) | 1.15 | 1.21 | 1.27 | V | EN rising, enables switching | 4 |
| EN falling threshold | VEN(F) | 1.08 | 1.14 | 1.2 | V | EN falling, disables switching | 4 |
| EN pin sink current | IEN(P) | 0.84 | 1.11 | 1.38 | µA | VEN = 1.0 V | 4 |
| EN pin hysteresis sink current | IEN(H) | 2.27 | 2.72 | 3.23 | µA | 4 | |
| FB pin voltage | VFB | 0.591 | 0.6 | 0.609 | V | TJ = 25℃ | 5 |
| FB pin voltage | VFB | 0.588 | 0.6 | 0.612 | V | TJ = -40℃ to 125℃, VIN = 12 V | 5 |
| FB pin input leakage current | IFB(LKG) | -100 | 0 | 100 | nA | TJ = 25℃ | 5 |
| Valley current limit, KP522201B | ILS(OC) | 2.6 | 3.2 | 3.8 | A | VIN = 12 V | 5 |
| VIN quiescent current, KP522201B | IQ(VIN) | 190 | µA | No switching, VEN = 5 V, VFB = VREF*105%, IOUT = 0 A | 4 | ||
| Internal soft-start time | TSS | 0.8 | ms | From 10% VOUT to 90% VOUT | 5 | ||
| EN delay time | TDLY | 400 | µs | From EN high to first switching pulse | 5 | ||
| Switching frequency (inductor current continuous) | FSW | 600 | kHz | VIN = 12V, VOUT = 1.05V, inductor current continuous | 5 | ||
| High-side MOSFET on-resistance | RDSON(HS) | 130 | mΩ | TJ = 25℃, VIN = 12V, VBOOT-SW = 5V | 5 | ||
| Low-side MOSFET on-resistance | RDSON(LS) | 70 | mΩ | TJ = 25℃, VIN = 12V | 5 | ||
| Minimum on-time | tON(min) | 50 | ns | Guaranteed by circuit design (footnote 1) | 5 | ||
| Minimum off-time | tOFF(min) | 200 | ns | 5 | |||
| Dead time | tDEAD | 10 | ns | 5 | |||
| Zero-cross detection threshold | IZC | 80 | mA | 5 | |||
| UVP threshold voltage (falling VFB) | VUVP | 65 | % | VFB falling | 5 | ||
| UVP hysteresis voltage | 7 | % | 5 | ||||
| UVP wait time before hiccup | THCP(WAIT) | 110 | µs | 5 | |||
| Hiccup off time before re-soft-start | THCP(OFF) | 12 | ms | 5 | |||
| OVP threshold voltage (rising VFB) | VOVP | 115 | % | VFB rising | 5 | ||
| OVP hysteresis voltage | 7 | % | 5 | ||||
| Over-temperature protection threshold | TJ(SD) | 165 | ℃ | 5 | |||
| Over-temperature protection recovery hysteresis | TJ(HYS) | 35 | ℃ | 5 | |||
| Junction-to-ambient thermal resistance (EVM board) | RθJA(EVM) | 69 | ℃/W | Based on EVM board 60mm x 45mm, 2-layer FR-4, 2oz Cu; VIN = 12V, VOUT = 5V, IOUT = 2A, TA = 25℃ | 4 |
CAD (KiCad official)
- Symbol:
KP522201BLGA - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
kp522201blga-etched.step/kp522201blga-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);kp522201blga.step/kp522201blga.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Kiwi Instruments datasheet (24 pp, sha256
de243c521caa6015, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# KP522201BLGA
**Kiwi Instruments** · DC-DC Converters · SOT-23-6
KP522201BLGA from Kiwi Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST | power_out | Bootstrap supply for the high-side MOSFET gate drive; a 100nF ceramic capacitor must be connected between BST and SW, and BOOT-SW is recommended to stay within -0.1 V to 5.5 V. |
| 2 | GND | power_in | Power and signal ground for the device. |
| 3 | FB | input | Feedback input fed by the resistor divider from VOUT for output voltage setting and control, with VREF = 0.6 V and a recommended range of -0.1 V to 5.5 V. |
| 4 | EN | input | Enable control: pull high or leave floating to enable the device; when connected to VIN a series pull-up resistor of at least 100 kΩ is required, and it also sets the VIN UVLO thresholds, with a recommended range of -0.1 V to 5.5 V. |
| 5 | VIN | power_in | Input supply pin with an operating range of 4.5 V to 17 V, requiring a 100nF ceramic decoupling capacitor placed as close as possible to VIN and GND. |
| 6 | SW | output | Switch node connected to the output inductor through a short, wide trace, with a recommended DC range of -0.1 V to 17 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Kiwi Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN pin voltage | VIN | -0.3 | | 19 | V | | 3 |
| SW pin voltage, DC | | -0.3 | | 19 | V | DC | 3 |
| SW pin voltage, transient | | -3 | | 21 | V | Transient < 10 ns | 3 |
| VIN-SW voltage, DC | | -0.3 | | 19 | V | DC | 3 |
| VIN-SW voltage, transient | | -3 | | 21 | V | Transient < 10 ns | 3 |
| BOOT pin voltage | | -0.3 | | 25 | V | | 3 |
| BOOT-SW voltage | | -0.3 | | 6 | V | | 3 |
| EN, FB pin voltage | | -0.3 | | 6 | V | | 3 |
| Operating junction temperature range | TJ | -40 | | 150 | ℃ | | 3 |
| Storage temperature range | TSTG | -65 | | 150 | ℃ | | 3 |
| ESD human body model | VESD_HBM | -2000 | | 2000 | V | Human body model (HBM) | 3 |
| ESD charged device model | VESD_CDM | -500 | | 500 | V | Charged device model (CDM) | 3 |
| VIN input voltage range | VIN | 4.5 | | 17 | V | | 3 |
| VOUT output voltage range | VOUT | 0.6 | | 7 | V | | 3 |
| IOUT output current range | IOUT | 0 | | 2 | A | | 3 |
| SW pin voltage, DC | | -0.1 | | 17 | V | DC | 3 |
| SW pin voltage, transient | | -3 | | 19 | V | Transient < 10 ns | 3 |
| VIN-SW voltage, DC | | -0.1 | | 17 | V | DC | 3 |
| VIN-SW voltage, transient | | -3 | | 19 | V | Transient < 10 ns | 4 |
| BOOT pin voltage | | -0.1 | | 22.5 | V | | 4 |
| BOOT-SW voltage | | -0.1 | | 5.5 | V | | 4 |
| EN, FB pin voltage | | -0.1 | | 5.5 | V | | 4 |
| Operating junction temperature range | TJ | -40 | | 125 | ℃ | | 4 |
| EN series pull-up resistor when EN tied to VIN | | 100 | | | kΩ | Required when EN is connected directly to VIN | 4 |
| VIN operating input voltage | | 4.5 | | 17 | V | | 4 |
| VIN shutdown current | ISHDN(VIN) | | 2.5 | 4.5 | µA | VIN = 12 V, VEN = 0 V | 4 |
| VIN UVLO rising threshold | VUVLO(R) | 4 | 4.2 | 4.4 | V | VIN rising | 4 |
| VIN UVLO falling threshold | VUVLO(F) | 3.6 | 3.8 | 4 | V | VIN falling | 4 |
| EN rising threshold | VEN(R) | 1.15 | 1.21 | 1.27 | V | EN rising, enables switching | 4 |
| EN falling threshold | VEN(F) | 1.08 | 1.14 | 1.2 | V | EN falling, disables switching | 4 |
| EN pin sink current | IEN(P) | 0.84 | 1.11 | 1.38 | µA | VEN = 1.0 V | 4 |
| EN pin hysteresis sink current | IEN(H) | 2.27 | 2.72 | 3.23 | µA | | 4 |
| FB pin voltage | VFB | 0.591 | 0.6 | 0.609 | V | TJ = 25℃ | 5 |
| FB pin voltage | VFB | 0.588 | 0.6 | 0.612 | V | TJ = -40℃ to 125℃, VIN = 12 V | 5 |
| FB pin input leakage current | IFB(LKG) | -100 | 0 | 100 | nA | TJ = 25℃ | 5 |
| Valley current limit, KP522201B | ILS(OC) | 2.6 | 3.2 | 3.8 | A | VIN = 12 V | 5 |
| VIN quiescent current, KP522201B | IQ(VIN) | | 190 | | µA | No switching, VEN = 5 V, VFB = VREF*105%, IOUT = 0 A | 4 |
| Internal soft-start time | TSS | | 0.8 | | ms | From 10% VOUT to 90% VOUT | 5 |
| EN delay time | TDLY | | 400 | | µs | From EN high to first switching pulse | 5 |
| Switching frequency (inductor current continuous) | FSW | | 600 | | kHz | VIN = 12V, VOUT = 1.05V, inductor current continuous | 5 |
| High-side MOSFET on-resistance | RDSON(HS) | | 130 | | mΩ | TJ = 25℃, VIN = 12V, VBOOT-SW = 5V | 5 |
| Low-side MOSFET on-resistance | RDSON(LS) | | 70 | | mΩ | TJ = 25℃, VIN = 12V | 5 |
| Minimum on-time | tON(min) | | 50 | | ns | Guaranteed by circuit design (footnote 1) | 5 |
| Minimum off-time | tOFF(min) | | 200 | | ns | | 5 |
| Dead time | tDEAD | | 10 | | ns | | 5 |
| Zero-cross detection threshold | IZC | | 80 | | mA | | 5 |
| UVP threshold voltage (falling VFB) | VUVP | | 65 | | % | VFB falling | 5 |
| UVP hysteresis voltage | | | 7 | | % | | 5 |
| UVP wait time before hiccup | THCP(WAIT) | | 110 | | µs | | 5 |
| Hiccup off time before re-soft-start | THCP(OFF) | | 12 | | ms | | 5 |
| OVP threshold voltage (rising VFB) | VOVP | | 115 | | % | VFB rising | 5 |
| OVP hysteresis voltage | | | 7 | | % | | 5 |
| Over-temperature protection threshold | TJ(SD) | | 165 | | ℃ | | 5 |
| Over-temperature protection recovery hysteresis | TJ(HYS) | | 35 | | ℃ | | 5 |
| Junction-to-ambient thermal resistance (EVM board) | RθJA(EVM) | | 69 | | ℃/W | Based on EVM board 60mm x 45mm, 2-layer FR-4, 2oz Cu; VIN = 12V, VOUT = 5V, IOUT = 2A, TA = 25℃ | 4 |
## CAD (KiCad official)
- Symbol: `KP522201BLGA`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `kp522201blga-etched.step` / `kp522201blga-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `kp522201blga.step` / `kp522201blga.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Kiwi Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589794679232360448) (24 pp, sha256 `de243c521caa6015`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/kp522201blga-datasheet.pdf)