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KP2126DP
Public Made by Adomby adom
Kiwi Instruments AC-DC Controllers And Regulators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownKP2126DP
Kiwi Instruments · AC-DC Controllers And Regulators · DIP-8
KP2126DP from Kiwi Instruments, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Chip supply pin; the datasheet gives a recommended VDD range of 11 to 27 V, an absolute maximum of -0.3 to 34.5 V, and a VDD clamp of 32.5 to 36.5 V at 7 mA. |
| 2 | GND | power_in | Chip ground pin. |
| 3 | FB | input | System feedback pin that receives the divided auxiliary-winding voltage for CV output voltage control and CC output current control, with an absolute voltage range of -0.7 to 7 V. |
| 4 | CS | input | Current-sense input for cycle-by-cycle over-current protection, with a Vcs(max) threshold of 490 to 510 mV, 500 ns leading-edge blanking, and an absolute voltage range of -0.3 to 7 V. |
| 5 | Drain | power_in | Drain of the internal power MOSFET, rated for a 650 V drain-source breakdown voltage (VBR minimum 650 V) and a maximum Drain voltage of 650 V. |
| 6 | Drain | power_in | Drain of the internal power MOSFET, rated for a 650 V drain-source breakdown voltage (VBR minimum 650 V) and a maximum Drain voltage of 650 V. |
| 7 | Drain | power_in | Drain of the internal power MOSFET, rated for a 650 V drain-source breakdown voltage (VBR minimum 650 V) and a maximum Drain voltage of 650 V. |
| 8 | Drain | power_in | Drain of the internal power MOSFET, rated for a 650 V drain-source breakdown voltage (VBR minimum 650 V) and a maximum Drain voltage of 650 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Kiwi Instruments |
| Package | DIP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD DC supply voltage | -0.3 | 34.5 | V | 4 | |||
| Drain voltage | -0.3 | 650 | V | 4 | |||
| FB, SEL voltage range | -0.7 | 7 | V | 4 | |||
| CS voltage range | -0.3 | 7 | V | 4 | |||
| VDD DC clamp current | 10 | mA | 4 | ||||
| Maximum junction operating temperature | 165 | oC | 4 | ||||
| Storage temperature range | -40 | 165 | oC | 4 | |||
| Soldering temperature | 260 | oC | Soldering, 10 s | 4 | |||
| ESD human body model | 3 | kV | 4 | ||||
| VDD supply voltage | 11 | 27 | V | 4 | |||
| Operating junction temperature | -40 | 150 | oC | 4 | |||
| Minimum operating frequency | 35 | kHz | Full load, flyback primary-side control | 4 | |||
| Maximum operating frequency | 70 | kHz | Full load, flyback primary-side control | 4 | |||
| VDD start-up current | IVDD_st | 2 | 15 | uA | 4 | ||
| VDD operating current | IVDD_Op | 0.3 | 0.7 | 0.9 | mA | VFB=1.1V, VDD=18V | 4 |
| VDD quiescent current | IVDD_standby | 0.5 | 1 | mA | 4 | ||
| VDD turn-on voltage | VDD_ON | 15 | 16.3 | 17.5 | V | 4 | |
| VDD turn-off voltage | VDD_OFF | 8 | 9 | 10 | V | 4 | |
| VDD OVP threshold | VDD_OVP | 28 | 30 | 32 | V | 4 | |
| VDD clamp voltage | VDD_Clamp | 32.5 | 34.5 | 36.5 | V | I(VDD) = 7 mA | 5 |
| Internal error amplifier reference input | VFBREF | 1.97 | 2 | 2.03 | V | 5 | |
| Maximum off time | Toff_max | 3.6 | 4 | 4.5 | ms | 5 | |
| Maximum cable compensation current | ICable_max | 48 | 53 | 58 | uA | 5 | |
| Overcurrent protection threshold | Vcs(max) | 490 | 500 | 510 | mV | 5 | |
| Power MOSFET static drain-source on-resistance | Rdson | 1.6 | 2 | Ω | 5 | ||
| Short-circuit protection threshold | VFB_SLP | 0.7 | V | 5 | |||
| Short-circuit protection debounce time | TFB_Short | 10 | ms | 5 | |||
| Demagnetization comparator threshold | VFB_DEM | 20 | mV | 5 | |||
| LEB blanking time | Tblank | 3.5 | us | CC mode (note 5) | 5 | ||
| LEB blanking time | Tblank | 2 | us | CV mode (note 5) | 5 | ||
| Leading edge blanking time | TLEB | 500 | ns | 5 | |||
| Overcurrent protection turn-off delay | TD_OC | 100 | ns | 5 | |||
| Over-temperature shutdown | TSD | 165 | °C | 5 | |||
| Over-temperature recovery | TRC | 135 | °C | 5 | |||
| Power MOSFET drain-source breakdown voltage | VBR | 650 | V | 5 | |||
| Internal MOSFET drain current | ID | 5 | A | 5 | |||
| Thermal resistance junction-to-ambient (DIP-8) | 105 | oC/W | 4 |
CAD (KiCad official)
- Symbol:
KP2126DP - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
kp2126dp-etched.step/kp2126dp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);kp2126dp.step/kp2126dp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Kiwi Instruments datasheet (8 pp, sha256
deacf836e16e89ce, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).