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Contents

README

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KP206BSGA

KIWI · AC-DC Controllers & Regulators · SOP-8

KP206BSGA from KIWI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SEL input Multiplexed function pin; for CC/CV output connect a typically 10-47nF capacitor to GND, for CV-only output leave it floating.
2 FB input Feedback input connected to the optocoupler in closed loop; its voltage sets the PWM gate drive duty cycle and the CS turn-off voltage.
3 CS input Current sense input multiplexed with OVP function.
4 GND power_in Chip reference ground.
5 GATE output Totem-pole gate drive output connected to the external MOSFET.
6 VDD power_in Chip power supply pin, recommended 9 to 22V operating range (32V absolute maximum).
7 NC unconnected No connection, left floating.
8 HV power_in High-voltage startup pin, rated up to 650V.

Key specifications

Parameter Value
Manufacturer KIWI
Package SOP-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
HV voltage HV 650 V 4
VDD DC supply voltage VDD 32 V 4
VDD DC clamp current 10 mA 4
FB, CS, SEL voltage -0.3 7 V 4
GATE voltage 20 V 4
Maximum junction temperature 150 oC 4
Storage temperature range -65 150 oC 4
Soldering temperature 260 oC soldering, 10 s 4
ESD human body model 3 kV excluding HV pin 4
Package thermal resistance (SOP-8) 150 oC/W SOP-8 4
VDD supply voltage VDD 9 22 V 4
Operating ambient temperature -40 85 oC 4
HV startup current 1 IHV_1 0.5 mA HV=500V, VDD=0V 4
HV startup current 2 IHV_2 5 mA HV=500V, VDD>2V 4
HV leakage current IHV_leakage 10 uA HV=500V, VDD=18V 4
VDD startup current IVDD_st 0.3 0.6 0.9 mA 4
VDD operating current IVDD_Op 1.2 2 mA VFB=3V, GATE=1nF 4
VDD quiescent current IVDD_standby 0.6 1 mA 4
VDD turn-on voltage VDD_ON 11 12 13 V 4
VDD turn-off voltage VDD_OFF 6.5 7.2 8 V 4
VDD OVP threshold VDD_OVP 24 26 28 V 5
VDD clamp voltage VDD_Clamp 28 30 32 V I(VDD)=5 mA 5
FB open-circuit voltage VFB_Open 5 5.6 6.3 V 5
Overcurrent threshold CV mode Vcs(max)_CV 0.97 1 1.03 V 5
Overcurrent threshold CC mode Vcs(max)_CC 1.15 1.2 1.25 V 5
CS OVP threshold (PWM OFF) Vcs(max)_OFF 235 250 265 mV 5
Normal operating frequency FOSC 60 65 70 kHz 5
Frequency shuffle range ΔF(shuffle)/FOSC -4 4 % 5
Constant-current reference VCC_Reg_SEL 291 300 309 mV SEL pin with capacitor 5
GATE output low level VOL 1 V Igate_sink=20mA 6
GATE output high level VOH 7.5 V Igate_source=20mA 6

CAD (KiCad official)

  • Symbol: KP206BSGA
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: kp206bsga-etched.step / kp206bsga-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); kp206bsga.step / kp206bsga.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: KIWI datasheet (8 pp, sha256 b41ee22152c93053, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF