KiCad - the KiCad Bridge
Public Made by Adomby adom
Drive your own KiCad from an AI, in the background: open every editor, read the whole board as data (the EDA Bridge Standard board model), stack-up, part heights, netlists, place, route, pour, DRC and exports.
B.Cu footprint pads are read unmirrored — back-side routing/preflight broken (QFN evidence)
Summary
The bridge's pad transform for B.Cu footprints reads pad positions as if the footprint were on F.Cu (no x-mirror applied), while KiCad's own engine correctly mirrors B.Cu-root footprints. Every IPC path that resolves pads for back-side footprints — kicad_route_net's preflight, via/track placement, routing — targets positions mirrored wrong by 2× the pad's local x offset. Boards with fine-pitch back-side parts (QFN-56 at 0.4mm) are unroutable through the bridge today: preflight rejects correct via positions as "would touch pad ".
Minimal repro
Board has a QFN-56 (QFN-56-1EP_7x7mm_P0.4mm_EP3.2x3.2mm) on B.Cu at (52,153) rot 0. Pad 19 at footprint-local (-1.00, 3.44) → true KiCad position (51.0, 156.44); pad 24 at local (+1.00, 3.44) → true position (53.0, 156.44) is what the bridge computes for BOTH lookups... concretely:
kicad_route_net {"net":"GND","width":0.15,"viaSize":0.45,"viaDrill":0.2,
"paths":[[{"pad":"U1.19","layer":"B.Cu"},{"x":53.0,"y":156.44,"layer":"F.Cu"}]]}
→ ERROR: "the planned GND via at (53.00, 156.44) would touch pad U1.24 (SWCLK); KiCad would give it that net"
The via sits exactly on pad 19's true position (x−px). The bridge claims it touches pad 24, whose true position is 2.0 mm away — but whose UNMIRRORED position (x+px = 53.0, 156.44) coincides with the via. So the bridge computes B.Cu pads unmirrored.
Proof the file convention is right (KiCad itself)
Flipping an R_0402 to the back in the KiCad 10.0.5 GUI and saving writes: root (layer "B.Cu"), pads still (layers "F.Cu" "F.Mask" "F.Paste") with UNMIRRORED local coords — i.e., the mirror is applied by KiCad at render/connectivity time, not stored. Then, with pads netted N1/N2 and tracks on B.Cu at the mirrored positions (10.51→15 net N1, 9.49→5 net N2), native kicad-cli pcb drc reports 0 violations / 0 unconnected — KiCad connects tracks to the mirrored pads (bridge: if literal, it would report shorts). Board file available on request.
Impact
kicad_route_netpreflight rejects correct plans for any B.Cu fine-pitch part (the whole back-side MCU strip of our 160×160 LED tile).- Any copper the binary router lands for B.Cu pads is offset by 2× the pad's local x (QFN: up to 6.9 mm) and will fail native DRC connectivity. Front-side-only boards (ESC G431) never exercised this.
Bridge 1.0.52/1.0.53, KiCad 10.0.5 on Windows, from the LED Grid Wall tile run (aiflow run tile-parked-kimi-k3-20260929-0025). Happy to send a PR against the transform if you point me at the pad-position computation.