KIA7042AF-RTF
Public Made by Adomby adom
KEC Semicon Supervisor and Reset ICs, SOT-89-3. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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KIA7042AF-RTF
KEC Semicon · Supervisor and Reset ICs · SOT-89-3
KIA7042AF-RTF from KEC Semicon, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive supply and monitored input. Absolute max -0.3 V to +15.0 V; nominal operation 5 V. Internally sensed and compared against the 4.2 V typical detect threshold (VS min 4.05 V, max 4.35 V). |
| 2 | GND | power_in | Ground / VEE reference (0 V). On the SOT-89 package the heat sink tab is common to this pin. |
| 3 | OUT | output | Active-low reset output, open-collector NPN. Pulls low (VOL ≤ 0.4 V at RL = 200 Ω) when VCC drops below the detect threshold; releases (high-Z, IOH ≤ 0.1 μA at VCC = 15 V) when VCC rises above VS+hysteresis. Sinks ≥20 mA at 25 °C. Requires an external pull-up. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | KEC Semicon |
| Package | SOT-89-3 |
| Category | PMIC |
| Pins | 3 |
Ordering variants
Same part, different packaging or reel option.
KIA7042AF-RTFKIA7042AF-RTFAPKIA7042AF-RTFAT
CAD (KiCad official)
- Symbol:
KIA7042AF-RTF - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
kia7042af-rtf-etched.step/kia7042af-rtf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);kia7042af-rtf.step/kia7042af-rtf.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
kia7042af-rtf.step |
57 KB | You want the bare part, or you mark your own boards. |
kia7042af-rtf-etched.step |
1.3 MB | You want the part with KIA7042AF-RTF already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 383 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: KEC Semicon datasheet (4 pp, sha256
ee964c11be24fd17, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# KIA7042AF-RTF
**KEC Semicon** · Supervisor and Reset ICs · SOT-89-3
KIA7042AF-RTF from KEC Semicon, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive supply and monitored input. Absolute max -0.3 V to +15.0 V; nominal operation 5 V. Internally sensed and compared against the 4.2 V typical detect threshold (VS min 4.05 V, max 4.35 V). |
| 2 | GND | power_in | Ground / VEE reference (0 V). On the SOT-89 package the heat sink tab is common to this pin. |
| 3 | OUT | output | Active-low reset output, open-collector NPN. Pulls low (VOL ≤ 0.4 V at RL = 200 Ω) when VCC drops below the detect threshold; releases (high-Z, IOH ≤ 0.1 μA at VCC = 15 V) when VCC rises above VS+hysteresis. Sinks ≥20 mA at 25 °C. Requires an external pull-up. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | KEC Semicon |
| Package | SOT-89-3 |
| Category | PMIC |
| Pins | 3 |
## Ordering variants
Same part, different packaging or reel option.
- `KIA7042AF-RTF`
- `KIA7042AF-RTFAP`
- `KIA7042AF-RTFAT`
## CAD (KiCad official)
- Symbol: `KIA7042AF-RTF`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `kia7042af-rtf-etched.step` / `kia7042af-rtf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `kia7042af-rtf.step` / `kia7042af-rtf.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`kia7042af-rtf.step`](kia7042af-rtf.step) | 57 KB | You want the bare part, or you mark your own boards. |
| [`kia7042af-rtf-etched.step`](kia7042af-rtf-etched.step) | 1.3 MB | You want the part with `KIA7042AF-RTF` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 383 faces against 42 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [KEC Semicon datasheet](docs/kia7042af-rtf-datasheet.pdf) (4 pp, sha256 `ee964c11be24fd17`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/kia7042af-rtf-datasheet.pdf)