component
KCY3008A
Public Made by Adomby adom
KIA Semicon Tech MOSFETs, DFN-8(5x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownKCY3008A
KIA Semicon Tech · MOSFETs · DFN-8(5x6)
KCY3008A from KIA Semicon Tech, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Source | passive | Source terminal of the N-channel MOSFET (pins 1, 2, 3 are tied together as Source). |
| 2 | Source | passive | Source terminal of the N-channel MOSFET (pins 1, 2, 3 are tied together as Source). |
| 3 | Source | passive | Source terminal of the N-channel MOSFET (pins 1, 2, 3 are tied together as Source). |
| 4 | Gate | input | Gate terminal of the MOSFET, with a maximum gate-source voltage of ±20 V. |
| 5 | Drain | passive | Drain terminal of the MOSFET (pins 5-8 are tied together as Drain), with a drain-source voltage rating of 85 V. |
| 6 | Drain | passive | Drain terminal of the MOSFET (pins 5-8 are tied together as Drain), with a drain-source voltage rating of 85 V. |
| 7 | Drain | passive | Drain terminal of the MOSFET (pins 5-8 are tied together as Drain), with a drain-source voltage rating of 85 V. |
| 8 | Drain | passive | Drain terminal of the MOSFET (pins 5-8 are tied together as Drain), with a drain-source voltage rating of 85 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | KIA Semicon Tech |
| Package | DFN-8(5x6) |
| Category | Transistors |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | BVDSS | 85 | 90 | V | VGS=0V,ID=250μA | 3 | |
| Zero gate voltage drain current | IDSS | 1 | μA | VDS=85V, VGS=0V, Tj=25 ºC | 3 | ||
| Zero gate voltage drain current | IDSS | 5 | μA | VDS=85V, VGS=0V, Tj=125 ºC | 3 | ||
| Gate threshold voltage | VGS(th) | 2 | 3 | 4 | V | VDS=VGS, ID=250μA, Tj=25 ºC | 3 |
| Gate leakage current | IGSS | 100 | nA | VGS=20V,VDS=0V | 3 | ||
| Drain-source on-resistance | RDS(on) | 4.5 | 5.5 | mΩ | VGS=10V,ID=50A, Tj=25 ºC | 3 | |
| Diode forward voltage | VSD | 0.85 | 1.4 | V | VGS=0V,ISD=50A | 3 | |
| Drain-to-Source Voltage | VDSS | 85 | V | TC=25 ºC | 2 | ||
| Continuous drain current (silicon limited) | ID | 100 | A | TC=25 ºC, DFN5*6 | 2 | ||
| Continuous drain current (package limited) | ID | 90 | A | TC=25 ºC, DFN5*6 | 2 | ||
| Continuous drain current (silicon limited) | ID | 70 | A | TC=100 ºC, DFN5*6 | 2 | ||
| Pulsed drain current | IDP | 480 | A | TC = 25°C, tp limited by Tjmax | 2 | ||
| Avalanche energy, single pulse | EAS | 560 | mJ | L=0.5mH, Rg=25Ω | 2 | ||
| Gate-Source voltage | VGS | -20 | 20 | V | 2 | ||
| Power dissipation | Ptot | 90 | W | TC = 25 ºC, DFN5*6 | 2 | ||
| Junction & storage temperature range | TJ, TSTG | -55 | 175 | ºC | 2 | ||
| Thermal resistance, junction-ambient | RθJA | 60 | ºC/W | DFN5*6 | 2 | ||
| Thermal resistance, junction-case | RθJC | 1.76 | ºC/W | DFN5*6 | 2 | ||
| Transconductance | gfs | 80 | S | VDS=5V,ID=50A | 3 | ||
| Gate resistance | RG | 1.5 | Ω | VGS=0V,VDS=0V, F=1MHz | 3 | ||
| Input capacitance | Ciss | 4030 | pF | VDS=40V,VGS=0V, F=1MHz | 3 | ||
| Output capacitance | Coss | 545 | pF | VDS=40V,VGS=0V, F=1MHz | 3 | ||
| Reverse transfer capacitance | Crss | 35 | pF | VDS=40V,VGS=0V, F=1MHz | 3 | ||
| Turn-on delay time | td(on) | 20 | ns | VDS=40V,Tj=25 ºC, VGS=10V,RL=3Ω | 3 | ||
| Rise time | tr | 38 | ns | VDS=40V,Tj=25 ºC, VGS=10V,RL=3Ω | 3 | ||
| Turn-off delay time | td(off) | 45 | ns | VDS=40V,Tj=25 ºC, VGS=10V,RL=3Ω | 3 | ||
| Fall time | tf | 20 | ns | VDS=40V,Tj=25 ºC, VGS=10V,RL=3Ω | 3 | ||
| Total gate charge | Qg | 65 | nC | VDS=40V,ID=25A, VGS=10V, F=1MHz | 3 | ||
| Gate-source charge | Qgs | 25 | nC | VDS=40V,ID=25A, VGS=10V, F=1MHz | 3 | ||
| Gate-drain charge | Qgd | 14 | nC | VDS=40V,ID=25A, VGS=10V, F=1MHz | 3 | ||
| Reverse recovery time | trr | 60 | ns | IF=20A, dIF/dt=500A/μs | 3 | ||
| Reverse recovery charge | Qrr | 340 | nC | IF=20A, dIF/dt=500A/μs | 3 |
CAD (KiCad official)
- Symbol:
KCY3008A - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
- 3D model files:
kcy3008a-etched.step/kcy3008a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);kcy3008a.step/kcy3008a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: KIA Semicon Tech datasheet (6 pp, sha256
3919a940017cf96e, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).