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JY9425X
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Shenzhen JingYang MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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JY9425X
Shenzhen JingYang · MOSFETs · SOP-8
JY9425X from Shenzhen JingYang, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, rated for -12A continuous drain current with VDS of -30V. |
| 2 | S | passive | Source of the P-channel MOSFET, rated for -12A continuous drain current with VDS of -30V. |
| 3 | S | passive | Source of the P-channel MOSFET, rated for -12A continuous drain current with VDS of -30V. |
| 4 | G | input | Gate of the P-channel MOSFET, with maximum gate-to-source voltage of ±20V and RDS(on) 13mΩ at VGS=-10V. |
| 5 | D | passive | Drain of the P-channel MOSFET, with maximum drain-to-source voltage of -30V and -12A continuous current. |
| 6 | D | passive | Drain of the P-channel MOSFET, with maximum drain-to-source voltage of -30V and -12A continuous current. |
| 7 | D | passive | Drain of the P-channel MOSFET, with maximum drain-to-source voltage of -30V and -12A continuous current. |
| 8 | D | passive | Drain of the P-channel MOSFET, with maximum drain-to-source voltage of -30V and -12A continuous current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
JY9425X - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
jy9425x-etched.step/jy9425x-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jy9425x.step/jy9425x.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen JingYang datasheet (8 pp, sha256
5fbc7cc17e2ce3a7, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# JY9425X
**Shenzhen JingYang** · MOSFETs · SOP-8
JY9425X from Shenzhen JingYang, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, rated for -12A continuous drain current with VDS of -30V. |
| 2 | S | passive | Source of the P-channel MOSFET, rated for -12A continuous drain current with VDS of -30V. |
| 3 | S | passive | Source of the P-channel MOSFET, rated for -12A continuous drain current with VDS of -30V. |
| 4 | G | input | Gate of the P-channel MOSFET, with maximum gate-to-source voltage of ±20V and RDS(on) 13mΩ at VGS=-10V. |
| 5 | D | passive | Drain of the P-channel MOSFET, with maximum drain-to-source voltage of -30V and -12A continuous current. |
| 6 | D | passive | Drain of the P-channel MOSFET, with maximum drain-to-source voltage of -30V and -12A continuous current. |
| 7 | D | passive | Drain of the P-channel MOSFET, with maximum drain-to-source voltage of -30V and -12A continuous current. |
| 8 | D | passive | Drain of the P-channel MOSFET, with maximum drain-to-source voltage of -30V and -12A continuous current. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `JY9425X`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `jy9425x-etched.step` / `jy9425x-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `jy9425x.step` / `jy9425x.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shenzhen JingYang datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603122846915055616) (8 pp, sha256 `5fbc7cc17e2ce3a7`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/jy9425x-datasheet.pdf)