component

JY809ES3-SX

Public Made by Adom

by adom

Shenzhen JingYang Supervisor and Reset ICs, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs jy809es3-sx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
jy809es3-sx-etched.fit.json jy809es3-sx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
jy809es3-sx-etched.glb jy809es3-sx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
jy809es3-sx-etched.step jy809es3-sx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
jy809es3-sx.glb Publish 0.1.0 · Ray
jy809es3-sx.kicad_mod Publish 0.1.0 · Ray
jy809es3-sx.kicad_sym Publish 0.1.0 · Ray
jy809es3-sx.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
jy809es3-sx.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json jy809es3-sx: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md jy809es3-sx: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

JY809ES3-SX

Shenzhen JingYang · Supervisor and Reset ICs · SOT-23

JY809ES3-SX from Shenzhen JingYang, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the supervisor.
2 RESET output Active-low reset output (open with internal drive). Remains low while VCC is below the factory reset threshold and for 250ms (typ., 140ms min.) after VCC rises above the threshold. Guaranteed valid for VCC >= 1.1V; a 100kΩ pull-down is recommended if logic must be defined below 1.1V. VOL <= 0.1V (R/S/T, ISINK=1.2mA) / 0.2V (L/M/J, ISINK=3.2mA); VOH >= 0.9*VCC (R/S/T) / VCC-1.5 (L/M/J).
3 VCC power_in Supply voltage. Operating range 1.1V (TA=0..70°C) or 1.2V (TA=-40..105°C) up to 5.5V. Absolute max -0.3V to 6.0V.

Key specifications

Parameter Value
Manufacturer Shenzhen JingYang
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • JY809ES3-R
  • JY809ES3-SX
  • JY809ES3-T
  • JY809ES3-M

CAD (KiCad official)

  • Symbol: JY809ES3-SX
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: jy809es3-sx-etched.step / jy809es3-sx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); jy809es3-sx.step / jy809es3-sx.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
jy809es3-sx.step 59 KB You want the bare part, or you mark your own boards.
jy809es3-sx-etched.step 2.2 MB You want the part with JY809ES3-SX already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 525 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shenzhen JingYang datasheet (5 pp, sha256 1826e8500c36d006, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF