component
JY809ES3-SX
Public Made by Adomby adom
Shenzhen JingYang Supervisor and Reset ICs, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C5364058). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+25−5
jy809es3-sx.lbr+20−2@@ -57,6 +57,18 @@ <smd name="1" x="-0.9375" y="0.9500" dx="1.4750" dy="0.6000" layer="1"/> <smd name="2" x="-0.9375" y="-0.9500" dx="1.4750" dy="0.6000" layer="1"/> <smd name="3" x="0.9375" y="-0.0000" dx="1.4750" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-1.3000" y="0.3800"/>+ <vertex x="-1.0600" y="0.0500"/>+ <vertex x="-1.5400" y="0.0500"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.3250" y="1.4500"/>+ <vertex x="0.6500" y="1.4500"/>+ <vertex x="0.6500" y="-1.4500"/>+ <vertex x="-0.6500" y="-1.4500"/>+ <vertex x="-0.6500" y="1.1250"/>+ </polygon> <wire x1="-0.7600" y1="1.5600" x2="0.7600" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.7600" y1="1.5100" x2="-0.7600" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.7600" y1="-0.3900" x2="-0.7600" y2="0.3900" width="0.1200" layer="21"/>@@ -66,7 +78,7 @@ <wire x1="0.7600" y1="-1.5600" x2="-0.7600" y2="-1.5600" width="0.1200" layer="21"/> <text x="0" y="2.288" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-2.288" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.3000" y="0.3800"/><vertex x="-1.0600" y="0.0500"/><vertex x="-1.5400" y="0.0500"/></polygon></package>+</package> </packages> <symbols> <symbol name="JY809ES3-SX">@@ -94,7 +106,13 @@ <connect gate="G$1" pin="RESET" pad="2"/> <connect gate="G$1" pin="VCC" pad="3"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="JY809ES3-SX" constant="no"/>+ <attribute name="MANUFACTURER" value="Shenzhen JingYang" constant="no"/>+ <attribute name="LCSC_PN" value="C5364058" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+5−3@@ -26,7 +26,9 @@ "model_3d_step": "jy809es3-sx.step", "lbr": "jy809es3-sx.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C5364058"+ }, "pins": [ { "number": "1",@@ -38,13 +40,13 @@ "number": "2", "name": "RESET", "type": "output",- "description": "Active-low reset output (open with internal drive). Remains low while VCC is below the factory reset threshold and for 250ms (typ., 140ms min.) after VCC rises above the threshold. Guaranteed valid for VCC >= 1.1V; a 100kΩ pull-down is recommended if logic must be defined below 1.1V. VOL <= 0.1V (R/S/T, ISINK=1.2mA) / 0.2V (L/M/J, ISINK=3.2mA); VOH >= 0.9*VCC (R/S/T) / VCC-1.5 (L/M/J)."+ "description": "Active-low reset output (open with internal drive). Remains low while VCC is below the factory reset threshold and for 250ms (typ., 140ms min.) after VCC rises above the threshold. Guaranteed valid for VCC >= 1.1V; a 100k\u03a9 pull-down is recommended if logic must be defined below 1.1V. VOL <= 0.1V (R/S/T, ISINK=1.2mA) / 0.2V (L/M/J, ISINK=3.2mA); VOH >= 0.9*VCC (R/S/T) / VCC-1.5 (L/M/J)." }, { "number": "3", "name": "VCC", "type": "power_in",- "description": "Supply voltage. Operating range 1.1V (TA=0..70°C) or 1.2V (TA=-40..105°C) up to 5.5V. Absolute max -0.3V to 6.0V."+ "description": "Supply voltage. Operating range 1.1V (TA=0..70\u00b0C) or 1.2V (TA=-40..105\u00b0C) up to 5.5V. Absolute max -0.3V to 6.0V." } ], "provenance": {