component
JY10220X
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Shenzhen JingYang MOSFETs, SOT-23-6L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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JY10220X
Shenzhen JingYang · MOSFETs · SOT-23-6L
JY10220X from Shenzhen JingYang, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain, connected internally to pins 2, 5 and 6; drain-source voltage rated 100 V. |
| 2 | D | passive | Drain, connected internally to pins 1, 5 and 6; continuous drain current 2.6 A, pulsed 20 A. |
| 3 | G | input | Gate, gate-source voltage rated ±20 V with threshold of 1 V min to 3 V max at 250 µA. |
| 4 | S | passive | Source of the N-channel MOSFET. |
| 5 | D | passive | Drain, connected internally to pins 1, 2 and 6; RDS(on) 90 mΩ at VGS = 10 V. |
| 6 | D | passive | Drain, connected internally to pins 1, 2 and 5; RDS(on) 85 mΩ at VGS = 4.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOT-23-6L |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 100 | V | 1 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 1 | ||
| Drain Current, Continuous | ID | 2.6 | A | Note 1a | 1 | ||
| Drain Current, Pulsed | ID | 20 | A | Pulsed | 1 | ||
| Maximum Power Dissipation | PD | 1.6 | W | Note 1a | 1 | ||
| Maximum Power Dissipation | PD | 0.8 | W | Note 1b | 1 | ||
| Operating and Storage Junction Temperature Range | TJ, TSTG | -55 | 125 | °C | 1 | ||
| Drain-Source Breakdown Voltage | BVDSS | 100 | V | VGS = 0 V, ID = 250 µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 10 | µA | VDS = 80 V, VGS = 0 V | 2 | ||
| Gate-Body Leakage, Forward | IGSSF | 100 | nA | VGS = 20 V, VDS = 0 V | 2 | ||
| Gate-Body Leakage, Reverse | IGSSR | -100 | nA | VGS = -20 V, VDS = 0 V | 2 | ||
| Gate Threshold Voltage | VGS(th) | 1 | 2.3 | 3 | V | VDS = VGS, ID = 250 µA | 2 |
| Drain-Source Diode Forward Voltage | VSD | 0.76 | 1.2 | V | VGS = 0 V, IS = 1.3 A (Note 2) | 2 | |
| Maximum Continuous Drain-Source Diode Forward Current | IS | 1.3 | A | 2 | |||
| Turn-On Delay Time | td(on) | 6 | 11 | ns | VDD = 50 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 2 | |
| Turn-On Rise Time | tr | 3.5 | 7 | ns | VDD = 50 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 23 | 37 | ns | VDD = 50 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 2 | |
| Turn-Off Fall Time | tf | 3.7 | 7.4 | ns | VDD = 50 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 2 | |
| Total Gate Charge | Qg | 14 | 20 | nC | 2 | ||
| Thermal Resistance, Junction-to-Ambient | RθJA | 78 | °C/W | Note 1a | 1 | ||
| Thermal Resistance, Junction-to-Ambient | RθJA | 156 | °C/W | Note 1b, minimum pad | 2 | ||
| Thermal Resistance, Junction-to-Case | RθJC | 30 | °C/W | Note 1 | 1 |
CAD (KiCad official)
- Symbol:
JY10220X - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files:
jy10220x-etched.step/jy10220x-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jy10220x.step/jy10220x.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen JingYang datasheet (7 pp, sha256
05493012da4aa4b5, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# JY10220X
**Shenzhen JingYang** · MOSFETs · SOT-23-6L
JY10220X from Shenzhen JingYang, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain, connected internally to pins 2, 5 and 6; drain-source voltage rated 100 V. |
| 2 | D | passive | Drain, connected internally to pins 1, 5 and 6; continuous drain current 2.6 A, pulsed 20 A. |
| 3 | G | input | Gate, gate-source voltage rated ±20 V with threshold of 1 V min to 3 V max at 250 µA. |
| 4 | S | passive | Source of the N-channel MOSFET. |
| 5 | D | passive | Drain, connected internally to pins 1, 2 and 6; RDS(on) 90 mΩ at VGS = 10 V. |
| 6 | D | passive | Drain, connected internally to pins 1, 2 and 5; RDS(on) 85 mΩ at VGS = 4.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOT-23-6L |
| Category | Transistors/Thyristors |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | | | 100 | V | | 1 |
| Gate-Source Voltage | VGSS | -20 | | 20 | V | | 1 |
| Drain Current, Continuous | ID | | | 2.6 | A | Note 1a | 1 |
| Drain Current, Pulsed | ID | | | 20 | A | Pulsed | 1 |
| Maximum Power Dissipation | PD | | | 1.6 | W | Note 1a | 1 |
| Maximum Power Dissipation | PD | | | 0.8 | W | Note 1b | 1 |
| Operating and Storage Junction Temperature Range | TJ, TSTG | -55 | | 125 | °C | | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 100 | | | V | VGS = 0 V, ID = 250 µA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 10 | µA | VDS = 80 V, VGS = 0 V | 2 |
| Gate-Body Leakage, Forward | IGSSF | | | 100 | nA | VGS = 20 V, VDS = 0 V | 2 |
| Gate-Body Leakage, Reverse | IGSSR | -100 | | | nA | VGS = -20 V, VDS = 0 V | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | 2.3 | 3 | V | VDS = VGS, ID = 250 µA | 2 |
| Drain-Source Diode Forward Voltage | VSD | | 0.76 | 1.2 | V | VGS = 0 V, IS = 1.3 A (Note 2) | 2 |
| Maximum Continuous Drain-Source Diode Forward Current | IS | | | 1.3 | A | | 2 |
| Turn-On Delay Time | td(on) | | 6 | 11 | ns | VDD = 50 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 2 |
| Turn-On Rise Time | tr | | 3.5 | 7 | ns | VDD = 50 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 2 |
| Turn-Off Delay Time | td(off) | | 23 | 37 | ns | VDD = 50 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 2 |
| Turn-Off Fall Time | tf | | 3.7 | 7.4 | ns | VDD = 50 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω | 2 |
| Total Gate Charge | Qg | | 14 | 20 | nC | | 2 |
| Thermal Resistance, Junction-to-Ambient | RθJA | | 78 | | °C/W | Note 1a | 1 |
| Thermal Resistance, Junction-to-Ambient | RθJA | | 156 | | °C/W | Note 1b, minimum pad | 2 |
| Thermal Resistance, Junction-to-Case | RθJC | | 30 | | °C/W | Note 1 | 1 |
## CAD (KiCad official)
- Symbol: `JY10220X`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files: `jy10220x-etched.step` / `jy10220x-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `jy10220x.step` / `jy10220x.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shenzhen JingYang datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603157828194480128) (7 pp, sha256 `05493012da4aa4b5`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/jy10220x-datasheet.pdf)