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JW5222SOTB#TRPBF
Public Made by Adomby adom
Joulwatt(杰华特) DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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JW5222SOTB#TRPBF
Joulwatt(杰华特) · DC-DC Converters · SOT-23-6
JW5222SOTB#TRPBF from Joulwatt(杰华特), in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Drive EN high to turn the regulator on and low to turn it off; EN rising threshold is 1.5V (min) and falling threshold is 0.4V (max). |
| 2 | GND | power_in | Ground pin. |
| 3 | SW | output | Switching node that supplies power to the output; connect the output LC filter from SW to the output load. |
| 4 | VIN | power_in | Input voltage pin that supplies the IC; connect a 2.5V to 6V supply and bypass VIN to GND with a suitably large capacitor. |
| 5 | POK | output | Open-drain power-good output that connects to the output through a 10kΩ resistor and is high when VFB is within ±12.5% of VREF. |
| 6 | FB | input | Output feedback pin that senses the output through a resistive divider and is regulated by the control loop to 0.6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Joulwatt(杰华特) |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN Under Voltage Lockout Threshold | VIN_UVLO | 2.3 | 2.45 | 2.55 | V | VIN rising | 4 |
| VIN Over Voltage Protection Threshold | VIN_OVP | 6.6 | 6.88 | 7.1 | V | VIN rising | 4 |
| Regulated Feedback Voltage | VFB | 0.588 | 0.6 | 0.612 | V | 2.5V<VIN<6V | 4 |
| PFET Current Limit | ILIM_TOP | 3.2 | 3.7 | 4.3 | A | Duty Cycle=65% | 4 |
| Switch Frequency | FSW | 0.8 | 1 | 1.2 | MHz | IOUT=1A | 4 |
| POK Low Threshold | VPOKL | 500 | 525 | 550 | mV | VFB falling | 4 |
| POK High Threshold | VPOKH | 660 | 695 | 730 | mV | VFB rising | 4 |
| Shutdown Current | ISHDN | 0.1 | 1 | μA | VEN=0V | 4 | |
| Quiescent Current | IQ | 60 | 80 | μA | VEN=5V, IOUT=0A, VFB=VREF*105% | 4 | |
| PFET Leakage Current | ILEAK_P | 0.1 | 1 | uA | VIN=5.5V, VEN=0V, VSW=0V | 4 | |
| NFET Leakage Current | ILEAK_N | 0.1 | 1 | uA | VIN=5.5V, VEN=0V, VSW=5.5V | 4 | |
| VIN Under Voltage Lockout Hysteresis | VIN_UVLO_HYST | 200 | mV | VIN falling | 4 | ||
| VIN Over Voltage Protection Hysteresis | VIN_OVP_HYST | 360 | mV | VIN falling | 4 | ||
| PFET On Resistance | RDSON_P | 110 | mΩ | VIN=3.6V, ISW=200mA | 4 | ||
| NFET On Resistance | RDSON_N | 90 | mΩ | VIN=3.6V, ISW=-200mA | 4 | ||
| Minimum On Time | TON_MIN | 70 | ns | 4 | |||
| Maximum Duty Cycle | DMAX | 100 | % | 4 | |||
| Soft-start Time | tss | 1 | ms | VOUT=1.8V | 4 | ||
| EN Input Logic High Voltage | VEN_H | 1.5 | V | VEN rising, FB=0.4V | 4 | ||
| EN Input Logic Low Voltage | VEN_L | 0.4 | V | VEN falling, FB=0.4V | 4 | ||
| Thermal Shutdown Threshold | TSHDN | 150 | ℃ | 4 | |||
| Temperature Hysteresis | THYS | 15 | ºC | 4 | |||
| All Pins Voltage | -0.3 | 7 | V | All pins | 2 | ||
| SW Pin Voltage | -0.3 | 7 | V | SW pin | 2 | ||
| SW Pin Transient Undershoot | -1.7 | V | SW pin, 40ns | 2 | |||
| SW Pin Transient Overshoot | 7.1 | V | SW pin, 70ns | 2 | |||
| Junction Temperature | 150 | ºC | 2 | ||||
| Lead Temperature | 260 | ºC | 2 | ||||
| ESD Susceptibility (Human Body Model) | 2 | kV | Human Body Model | 2 | |||
| Recommended Operating Junction Temperature Range | -40 | 125 | ºC | 3 | |||
| Storage Temperature Range | -65 | 150 | ºC | 3 | |||
| Recommended Max Case Temperature | TC | 122 | ºC | 3 | |||
| Recommended Max Power Loss | PD | 0.45 | W | PD@25ºC | 3 | ||
| Junction-to-Case Thermal Resistance | RθJC | 130 | ºC/W | JESD51-7, 4-layer PCB | 3 | ||
| Junction-to-Ambient Thermal Resistance | RθJA | 220 | ºC/W | JESD51-7, 4-layer PCB | 3 | ||
| Junction-to-Board Thermal Resistance | RθJB | 36.1 | ºC/W | JESD51-7, 4-layer PCB | 3 | ||
| Junction-to-Top Characterization Parameter | ψJT | 2.3 | ºC/W | JESD51-7, 4-layer PCB | 3 | ||
| Junction-to-Board Characterization Parameter | ψJB | 35.3 | ºC/W | JESD51-7, 4-layer PCB | 3 |
CAD (KiCad official)
- Symbol:
JW5222SOTB#TRPBF - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
jw5222sotb-trpbf-etched.step/jw5222sotb-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jw5222sotb-trpbf.step/jw5222sotb-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Joulwatt(杰华特) datasheet (18 pp, sha256
3de13819100915e0, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).