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JTDHT50
Public Made by Adomby adom
JTD Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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JTDHT50
JTD · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23
JTDHT50 from JTD, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin (地) that serves as the regulator's return reference. |
| 2 | VOUT | power_out | Regulated output pin (输出); the HT50 output is nominally 5.0 V with a minimum 100 mA output current when VIN = VOUT + 2.0 V. |
| 3 | VIN | power_in | Input pin (输入); the datasheet limits the operating input voltage to 24 V, with an absolute maximum rating of +26 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JTD |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VOUT | 4.9 | 5 | 5.1 | V | VIN=VOUT+2.0V, IOUT=10mA | 6 |
| Output current | IOUT | 100 | 150 | mA | VIN=VOUT+2.0V | 6 | |
| Load regulation | △VOUT | 25 | 60 | mV | VIN=VOUT+2.0V, 1mA≤IOUT≤70mA | 6 | |
| Dropout voltage | VDIF | 25 | 55 | mV | IOUT=1mA, △VOUT=2% | 6 | |
| Quiescent current | ISS | 1.5 | 3 | μA | 无负载 (no load) | 6 | |
| Line regulation | △VOUT/VOUT*△VIN | 0.2 | %/V | VOUT+1.0V≤VIN≤24V, IOUT=1mA | 6 | ||
| Input voltage | VIN | 24 | V | 6 | |||
| Input voltage (absolute maximum rating) | VIN | -0.3 | 26 | V | 工作电压 (operating voltage) as printed in maximum ratings table | 2 | |
| Storage temperature | TSTG | -50 | 125 | ℃ | 2 | ||
| Operating temperature | TA | -40 | 85 | ℃ | 2 |
CAD (KiCad official)
- Symbol:
JTDHT50 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
jtdht50-etched.step/jtdht50-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jtdht50.step/jtdht50.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JTD datasheet (11 pp, sha256
dc1efc883cbe6fe6, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# JTDHT50
**JTD** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23
JTDHT50 from JTD, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin (地) that serves as the regulator's return reference. |
| 2 | VOUT | power_out | Regulated output pin (输出); the HT50 output is nominally 5.0 V with a minimum 100 mA output current when VIN = VOUT + 2.0 V. |
| 3 | VIN | power_in | Input pin (输入); the datasheet limits the operating input voltage to 24 V, with an absolute maximum rating of +26 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JTD |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VOUT | 4.9 | 5 | 5.1 | V | VIN=VOUT+2.0V, IOUT=10mA | 6 |
| Output current | IOUT | 100 | 150 | | mA | VIN=VOUT+2.0V | 6 |
| Load regulation | △VOUT | | 25 | 60 | mV | VIN=VOUT+2.0V, 1mA≤IOUT≤70mA | 6 |
| Dropout voltage | VDIF | | 25 | 55 | mV | IOUT=1mA, △VOUT=2% | 6 |
| Quiescent current | ISS | | 1.5 | 3 | μA | 无负载 (no load) | 6 |
| Line regulation | △VOUT/VOUT*△VIN | | | 0.2 | %/V | VOUT+1.0V≤VIN≤24V, IOUT=1mA | 6 |
| Input voltage | VIN | | | 24 | V | | 6 |
| Input voltage (absolute maximum rating) | VIN | -0.3 | | 26 | V | 工作电压 (operating voltage) as printed in maximum ratings table | 2 |
| Storage temperature | TSTG | -50 | | 125 | ℃ | | 2 |
| Operating temperature | TA | -40 | | 85 | ℃ | | 2 |
## CAD (KiCad official)
- Symbol: `JTDHT50`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `jtdht50-etched.step` / `jtdht50-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `jtdht50.step` / `jtdht50.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [JTD datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8632220619259654144) (11 pp, sha256 `dc1efc883cbe6fe6`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/jtdht50-datasheet.pdf)