component
JSMRC523
Public Made by Adomby adom
JSMSEMI RFID ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownJSMRC523
JSMSEMI · RFID ICs · QFN-32-EP(5x5)
JSMRC523 from JSMSEMI, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Address line input. |
| 2 | PVDD | power_in | Pin power supply. |
| 3 | DVDD | power_in | Digital power supply. |
| 4 | DVSS | power_in | Digital ground. |
| 5 | PVSS | power_in | Pin power supply ground. |
| 6 | NRSTPD | input | Reset and power-down input: when low, internal blocks including the oscillator stop and the input pins are disconnected from the outside; a rising edge starts the internal reset phase. |
| 7 | SIGIN | input | Communication interface input that receives the digital serial data stream. |
| 8 | SIGOUT | output | Communication interface output that outputs the serial data stream. |
| 9 | SVDD | power_in | I2C pin power supply that powers the I2C pins. |
| 10 | TVSS | power_in | Ground for the TX1 and TX2 transmitter output stages. |
| 11 | TX1 | output | Carrier transmit output 1. |
| 12 | TVDD | power_in | Transmitter driver power supply. |
| 13 | TX2 | output | Carrier transmit output 2. |
| 14 | TVSS | power_in | Transmitter driver power supply ground. |
| 15 | AVDD | power_in | Analog power supply. |
| 16 | VMID | power_out | Internal reference voltage. |
| 17 | RX | input | RF signal input. |
| 18 | AVSS | power_in | Analog ground. |
| 19 | AUX1 | output | Auxiliary output for testing. |
| 20 | AUX2 | output | Auxiliary output for testing. |
| 21 | OSCIN | input | Crystal oscillator inverting amplifier input, also usable as external clock input (fosc=27.12MHz). |
| 22 | OSCOUT | output | Crystal oscillator inverting amplifier output. |
| 23 | IRQ | output | Interrupt request output indicating an interrupt event. |
| 24 | ALE | input | Address latch enable: latches AD0-AD5 into the internal address latch when high. |
| 25 | D1 | bidirectional | Bit of the 8-bit bidirectional data bus (D1-D7); the 8-bit parallel interface is not supported, with I2C these pins can define the I2C address, with serial interfaces they can be used as test signals or I/O. |
| 26 | D2 | bidirectional | Bit of the 8-bit bidirectional data bus (D1-D7); the 8-bit parallel interface is not supported, with I2C these pins can define the I2C address, with serial interfaces they can be used as test signals or I/O. |
| 27 | D3 | bidirectional | Bit of the 8-bit bidirectional data bus (D1-D7); the 8-bit parallel interface is not supported, with I2C these pins can define the I2C address, with serial interfaces they can be used as test signals or I/O. |
| 28 | D4 | bidirectional | Bit of the 8-bit bidirectional data bus (D1-D7); the 8-bit parallel interface is not supported, with I2C these pins can define the I2C address, with serial interfaces they can be used as test signals or I/O. |
| 29 | D5 | bidirectional | Bit of the 8-bit bidirectional data bus (D1-D7); the 8-bit parallel interface is not supported, with I2C these pins can define the I2C address, with serial interfaces they can be used as test signals or I/O. |
| 30 | D6 | bidirectional | Bit of the 8-bit bidirectional data bus (D1-D7); the 8-bit parallel interface is not supported, with I2C these pins can define the I2C address, with serial interfaces they can be used as test signals or I/O. |
| 31 | D7 | bidirectional | Bit of the 8-bit bidirectional data bus (D1-D7); the 8-bit parallel interface is not supported, with I2C these pins can define the I2C address, with serial interfaces they can be used as test signals or I/O. |
| 32 | A0 | input | Address line input. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | QFN-32-EP(5x5) |
| Category | RF And Wireless |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
JSMRC523 - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
jsmrc523-etched.step/jsmrc523-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jsmrc523.step/jsmrc523.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (24 pp, sha256
034421b5859b136a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).