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JSMCV520

Public Made by Adom

by adom

JSMSEMI RFID ICs, HVQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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JSMCV520

JSMSEMI · RFID ICs · HVQFN-32-EP(5x5)

JSMCV520 from JSMSEMI, in a HVQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SPI power_in Connects to DVSS digital ground
2 PVDD power_in Pin power supply voltage 1.6 to 3.6 V
3 DVDD power_in Digital power supply voltage 2.5 to 3.6 V
4 DVSS power_in Digital ground
5 PVSS power_in Pin power supply ground
6 NRSTPD input Reset and power-down input; low-level triggers power-down, rising edge triggers reset
7 MFIN input MIFARE signal input
8 MFOUT output MIFARE signal output
9 SVDD power_in Power supply for MFIN and MFOUT pins 1.6 to 3.6 V
10 TVSS power_in Transmitter power supply ground
11 TX1 output Antenna driver output 1; 13.56 MHz modulated carrier
12 TVDD power_in Transmitter power supply voltage 2.5 to 3.6 V
13 TX2 output Antenna driver output 2; 13.56 MHz modulated carrier
14 TVSS power_in Transmitter power supply ground
15 AVDD power_in Analog power supply voltage 2.5 to 3.6 V
16 VMID power_in Internal reference voltage for analog circuits
17 RX input RF signal input from antenna for reception
18 AVSS power_in Analog power supply ground
19 AUX1 output Test auxiliary output 1; analog test signal output
20 AUX2 output Test auxiliary output 2; analog test signal output
21 OSCIN input Crystal oscillator buffer input; 27.12 MHz quartz crystal or external clock signal input
22 OSCOUT output Crystal oscillator buffer output; 27.12 MHz clock output
23 IRQ output Interrupt request output; signals interrupt events to host microcontroller
24 NSS input SPI chip select input; active-low slave select
25 D1 bidirectional Digital test pin; configurable as input, output, or tri-state
26 D2 bidirectional Digital test pin; configurable as input, output, or tri-state
27 D3 bidirectional Digital test pin; configurable as input, output, or tri-state
28 D4 bidirectional Digital test pin; configurable as input, output, or tri-state
29 D5/SCK input SPI serial clock input or test pin D5; accepts clock signal from SPI master
30 D6/MOSI bidirectional SPI master output slave input or test pin D6; receives data from SPI master
31 D7/MISO bidirectional SPI master input slave output or test pin D7; transmits data to SPI master
32 EA power_in Expander pad connection to DVDD digital power supply
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package HVQFN-32-EP(5x5)
Category RF And Wireless
Pins 33

CAD (KiCad official)

  • Symbol: JSMCV520
  • Footprint: Package_DFN_QFN:HVQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm
  • 3D model: HVQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: jsmcv520-etched.step / jsmcv520-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); jsmcv520.step / jsmcv520.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (69 pp, sha256 2a61376a1a5f5898, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF