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Contents

README

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JSM66302

JSMSEMI · RFID ICs · QFN-32-EP(5x5)

JSM66302 from JSMSEMI, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TDO / OUT0 output Test data output for the boundary scan interface, or general purpose output 0 when enabled via PinEn.
2 TDI / OUT1 input Test data input for the boundary scan interface, or general purpose output 1 when enabled via PinEn.
3 TMS / OUT2 input Test mode select for the boundary scan interface, or general purpose output 2 when enabled via PinEn.
4 TCK / OUT3 input Test clock for the boundary scan interface, or general purpose output 3 when enabled via PinEn.
5 SIGIN/OUT7 input Listed as contactless communication interface output in the description, but typed as input in the table; general purpose output 7 when enabled via PinEn.
6 SIGOUT output Listed as contactless communication interface input in the description, but typed as output in the table; configurable via SigOut register (3-state, 0, 1 or internal signal monitor).
7 DVDD power_out Digital power supply buffer; this pin is used for connection of a buffer capacitor and connecting a supply voltage may damage the device.
8 VDD power_in Power supply; VDD must always be the same or higher voltage than PVDD, with a 3.0 V to 5.5 V supply range in the quick reference.
9 AVDD power_out Analog power supply buffer; this pin is used for connection of a buffer capacitor and connecting a supply voltage may damage the device.
10 AUX1 output Auxiliary output used for analog test signals.
11 AUX2 output Auxiliary output used for analog test signals.
12 RXP input Receiver input pin for the received RF signal.
13 RXN input Receiver input pin for the received RF signal.
14 VMID power_out Internal receiver reference voltage; used for connection of a buffer capacitor and connecting a supply voltage may damage the device.
15 TX2 output Transmitter 2 output delivering the modulated 13.56 MHz carrier.
16 TVSS power_in Transmitter ground supplying the output stage of TX1 and TX2.
17 TX1 output Transmitter 1 output delivering the modulated 13.56 MHz carrier.
18 TVDD power_in Transmitter voltage supply; 3.0 V to 5.5 V per the quick reference data.
19 XTAL1 input Crystal oscillator input to the inverting amplifier; also the input for an externally generated 27.12 MHz clock.
20 XTAL2 output Crystal oscillator output from the inverting amplifier of the oscillator.
21 PDOWN input Power down (reset) input; the power-down current is specified with this pin pulled HIGH.
22 CLKOUT / OUT6 output Clock output, or general purpose output 6 when enabled via PinEn.
23 SCL output Serial clock line for the host I2C interface (typed as output in the table).
24 SDA bidirectional Serial data line for the host I2C interface.
25 PVDD power_in Pad power supply; must always be the same or lower voltage than VDD.
26 IFSEL0 / OUT4 input Host interface selection 0, or general purpose output 4 when enabled via PinEn.
27 IFSEL1 / OUT5 input Host interface selection 1, or general purpose output 5 when enabled via PinEn.
28 IF0 bidirectional Multifunction host interface pin that can be assigned to RS232, SPI, I2C or I2CL.
29 IF1 bidirectional Multifunction host interface pin that can be assigned to SPI, I2C or I2CL.
30 IF2 bidirectional Multifunction host interface pin that can be assigned to RS232, SPI, I2C or I2CL.
31 IF3 bidirectional Multifunction host interface pin that can be assigned to RS232, SPI, I2C or I2CL.
32 IRQ output Interrupt request output signalling an interrupt event.
33 VSS power_in Ground and heat sink connection (exposed pad).

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package QFN-32-EP(5x5)
Category RF And Wireless
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (absolute maximum) VDD -0.5 6 V 116
PVDD supply voltage (absolute maximum) VDD(PVDD) -0.5 6 V 116
TVDD supply voltage (absolute maximum) VDD(TVDD) -0.5 6 V 116
TVDD supply current (absolute maximum) IDD(TVDD) 250 mA JSM66302 116
Input voltage on pin RXP (absolute maximum) Vi(RXP) -0.5 2 V 116
Input voltage on pin RXN (absolute maximum) Vi(RXN) -0.5 2 V 116
Total power dissipation per package (absolute maximum) Ptot 1125 mW 116
ESD voltage Human Body Model (absolute maximum) VESD(HBM) -2000 2000 V Human Body Model (HBM); 1500 , 100 pF; JESD22-A114-B 116
ESD voltage Charge Device Model (absolute maximum) VESD(CDM) -500 500 V Charge Device Model (CDM) 116
Maximum junction temperature (absolute maximum) Tj(max) 125 °C 116
Storage temperature (absolute maximum) Tstg -55 150 °C no supply voltage applied 116
VDD supply voltage (recommended) VDD 3 5 5.5 V 116
TVDD supply voltage (recommended) VDD(TVDD) 3 5 5.5 V Note [1]: VDD(PVDD) must always be the same or lower than VDD 116
PVDD supply voltage (recommended) VDD(PVDD) 3 5 5.5 V 116
Operating ambient temperature (recommended) Tamb -25 25 85 °C in still air with exposed pin soldered on a 4 layer JEDEC PCB 116
Storage temperature (recommended) Tstg -40 25 125 °C no supply voltage applied, relative humidity 45...75% 116
Supply current, modem on IDD 17 20 mA IDD = AVDD+DVDD; modem on (transmitter and receiver are switched on) 117
Supply current, modem off IDD 0.45 0.5 mA IDD = AVDD+DVDD; modem off (transmitter and receiver are switched off) 117
PVDD supply current IDD(PVDD) 0.5 5 A no load on digital pins, leakage current only 117
TVDD supply current IDD(TVDD) 100 250 mA JSM66302 117
Power-down current, ambient +25 °C Ipd 40 400 nA All OUTx pins floating; ambient temp = +25 °C 117
Power-down current, ambient -40 °C to +85 °C Ipd 1.5 2.1 A All OUTx pins floating; ambient temp = -40°C...+85°C 117
Standby current, ambient 25 °C Istby 3 6 A All OUTx pins floating; ambient temp = 25 °C; Istby = IVDD+ITVDD+ IPVDD 117
Standby current, ambient -40 °C to +105 °C Istby 5.25 26 A All OUTx pins floating; ambient temp = -40°C...+105°C; Istby = IVDD+ITVDD+ IPVDD 117
LPCD sleep current ILPCD(sleep) 3.3 6.3 A All OUTx pins floating; LFO active, no RF field on; ambient temp = 25 °C 118
External buffer capacitor AVDD CL 220 470 nF 118
External buffer capacitor DVDD CL 220 470 nF 118
Input leakage current, I/O pins ILI 0 50 500 nA output disabled 118
LOW-level input voltage, I/O pins VIL -0.5 V 118
LOW-level output voltage, I/O pins VOL 0 0 0.4 V 118
Input capacitance, I/O pins Ci 0 2.5 4.5 pF 118
LOW-level input voltage, PDOWN pin VIL 0 0 0.4 V 118
Pull-up resistance TCK, TMS, TDI, IF2 Rpu 50 72 120 K 118
Output voltage AUX 1, AUX 2 Vo 0 1.8 V 118
Load capacitance AUX 1, AUX 2 CL 0 400 pF 118
Input voltage RXP, RXN Vpp 0 1.65 1.8 V 118
Input capacitance RXP, RXN Ci 2 3.5 5 pF 118
Input voltage XTAL1 Vi 0 1.8 V pin XTAL1 119
Equivalent series resistance (crystal) ESR 50 100 119
Crystal power dissipation Pxtal 50 100 W 119
Input leakage current, IF3-SDA (I2C) ILI 2 100 nA output disabled 119
LOW-level input voltage, IF3-SDA (I2C) VIL -0.5 V 119
LOW-level output voltage, IF3-SDA (I2C) VOL 0.3 V IOL = 3 mA 119
LOW-level output current, IF3-SDA (VOL = 0.4 V) IOL 4 mA VOL = 0.4 V; Standard mode, Fast mode 119
LOW-level output current, IF3-SDA (VOL = 0.6 V) IOL 6 mA VOL = 0.6 V; Standard mode, Fast mode 119
Output fall time, IF3-SDA tf(o) 250 ns Standard mode, Fast mode, CL < 400 pF 119
Output fall time, IF3-SDA, Fast mode+ tf(o) 120 ns Fast mode +; CL < 550 pF 119
Pulse width of spikes suppressed by input filter tSP 0 50 ns 119
Input capacitance, IF3-SDA Ci 3.5 5 pF 119
Load capacitance, standard mode CL 400 pF Standard mode 120
Load capacitance, fast mode CL 550 pF Fast mode 120
EEPROM data retention time tEER 10 year Tamb = +55 °C 120
SCK LOW time (SPI) tSCKL 50 ns 120
SCK HIGH time (SPI) tSCKH 50 ns 120
SCK HIGH to data input hold time (SPI) th(SCKH-D) 25 ns SCK to changing MOSI 120
Data input to SCK HIGH set-up time (SPI) tsu(D-SCKH) 25 ns changing MOSI to SCK 120
SCK LOW to data output hold time (SPI) th(SCKL-Q) 25 ns SCK to changing MISO 120
SCK LOW to NSS HIGH time (SPI) t(SCKL-NSSH) 0 ns 120
Thermal resistance junction to ambient (HVQFN32) Rth(j-a) 40 K/W in still air with exposed pin soldered on a 4 layer JEDEC PCB 117

CAD (KiCad official)

  • Symbol: JSM66302
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: jsm66302-etched.step / jsm66302-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); jsm66302.step / jsm66302.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (139 pp, sha256 ce86b9e73e03cbc2, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF