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Contents

README

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JSM15N10D

JSMSEMI · MOSFETs · TO-252

JSM15N10D from JSMSEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; controls the channel, with VGS rated ±20 V maximum and a threshold VGS(th) of 1 V min to 3 V max at ID=250 µA.
2 D passive Drain (also the exposed tab); VDS rated 100 V, continuous drain current 15 A at TC=25°C and 60 A pulsed.
3 S passive Source; connects to the source terminal of the 100 V N-channel MOSFET and carries the body-diode current (VSD typ 0.8 V, max 1.2 V at IS=8 A).

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package TO-252
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: JSM15N10D
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: jsm15n10d-etched.step / jsm15n10d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); jsm15n10d.step / jsm15n10d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (5 pp, sha256 302f7f2840d46d5a, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF