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JMTP080N04D

Jiangsu JieJie Microelectronics · MOSFETs · SOP-8

JMTP080N04D from Jiangsu JieJie Microelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel); VDS rated 40V, continuous drain current 13A at TA = 25°C.
2 G1 input Gate of MOSFET 1; gate-to-source voltage limited to ±20V, threshold 1.3V to 2.5V.
3 S2 passive Source of MOSFET 2 (N-channel); VDS rated 40V, continuous drain current 13A at TA = 25°C.
4 G2 input Gate of MOSFET 2; gate-to-source voltage limited to ±20V, threshold 1.3V to 2.5V.
5 D2 passive Drain of MOSFET 2, shorted to pin 6; drain-to-source voltage 40V max, RDS(ON) below 10.3mΩ at VGS = 10V.
6 D2 passive Drain of MOSFET 2, shorted to pin 5; drain-to-source voltage 40V max, RDS(ON) below 10.3mΩ at VGS = 10V.
7 D1 passive Drain of MOSFET 1, shorted to pin 8; drain-to-source voltage 40V max, RDS(ON) below 10.3mΩ at VGS = 10V.
8 D1 passive Drain of MOSFET 1, shorted to pin 7; drain-to-source voltage 40V max, RDS(ON) below 10.3mΩ at VGS = 10V.

Key specifications

Parameter Value
Manufacturer Jiangsu JieJie Microelectronics
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage V(BR)DSS 40 V ID = 250µA, VGS = 0V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 40V, VGS = 0V 2
Gate-Body Leakage Current IGSS -100 100 nA VDS = 0V, VGS = ±20V 2
Gate Threshold Voltage VGS(th) 1.3 1.9 2.5 V VDS = VGS, ID = 250µA 2
Static Drain-Source On-Resistance RDS(ON) 7.9 10.3 mΩ VGS = 10V, ID = 13A 2
Static Drain-Source On-Resistance RDS(ON) 10.5 13.7 mΩ VGS = 4.5V, ID = 10A 2
Maximum Continuous Drain to Source Diode Forward Current IS 13 A 2
Maximum Pulsed Drain to Source Diode Forward Current ISM 52 A 2
Drain to Source Diode Forward Voltage VSD 1.2 V VGS = 0V, IS = 13A 2
Drain-to-Source Voltage VDS 40 V TA = 25°C 1
Gate-to-Source Voltage VGS -20 20 V TA = 25°C 1
Continuous Drain Current ID 13 A TA = 25°C 1
Continuous Drain Current ID 8 A TA = 100°C 1
Pulsed Drain Current IDM 52 A 1
Single Pulsed Avalanche Energy EAS 81 mJ Starting TJ=25C, VDD=20V, VG=10V, RG=25ohm, L=0.5mH, IAS=18A 1
Power Dissipation PD 2 W TA = 25°C 1
Junction & Storage Temperature Range TJ, TSTG -55 150 °C 1
Thermal Resistance, Junction to Ambient RθJA 63 °C/W mounted on 1inch2 pad of 2oz copper FR4 PCB 1
Input Capacitance Ciss 2443 pF VGS = 0V, VDS = 20V, f = 1MHz 2
Output Capacitance Coss 167 pF VGS = 0V, VDS = 20V, f = 1MHz 2
Reverse Transfer Capacitance Crss 138 pF VGS = 0V, VDS = 20V, f = 1MHz 2
Total Gate Charge Qg 48 nC VGS = 0 to 10V, VDS = 20V, ID = 13A 2
Gate Source Charge Qgs 10 nC VGS = 0 to 10V, VDS = 20V, ID = 13A 2
Gate Drain (Miller) Charge Qgd 10 nC VGS = 0 to 10V, VDS = 20V, ID = 13A 2
Turn-On Delay Time td(on) 10 ns VGS = 10V, VDD = 20V, ID= 13A, RGEN = 3Ω 2
Turn-On Rise Time tr 28 ns VGS = 10V, VDD = 20V, ID= 13A, RGEN = 3Ω 2
Turn-Off Delay Time td(off) 40 ns VGS = 10V, VDD = 20V, ID= 13A, RGEN = 3Ω 2
Turn-Off Fall Time tf 7 ns VGS = 10V, VDD = 20V, ID= 13A, RGEN = 3Ω 2
Body Diode Reverse Recovery Time trr 11 ns IF = 13A, di/dt = 100A/us 2
Body Diode Reverse Recovery Charge Qrr 5 nC IF = 13A, di/dt = 100A/us 2

CAD (KiCad official)

  • Symbol: JMTP080N04D
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: jmtp080n04d-etched.step / jmtp080n04d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); jmtp080n04d.step / jmtp080n04d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Jiangsu JieJie Microelectronics datasheet (6 pp, sha256 9c214e5dca3bffc6, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF