component
JMTL850P04A
Public Made by Adomby adom
Jiangsu JieJie Microelectronics MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 29d ago |
| viewers | 29d ago |
| jmtl850p04a-etched.glb | 29d ago |
| jmtl850p04a-etched.step | 29d ago |
| jmtl850p04a-hero.glb | 29d ago |
| jmtl850p04a-hero.overlay.json | 29d ago |
| jmtl850p04a.glb | 29d ago |
| jmtl850p04a.kicad_mod | 29d ago |
| jmtl850p04a.kicad_sym | 29d ago |
| jmtl850p04a.lbr | 29d ago |
| jmtl850p04a.step | 29d ago |
| package.json | 29d ago |
| page.json | 24d ago |
| README.md | 24d ago |
JMTL850P04A
Jiangsu JieJie Microelectronics · MOSFETs · SOT-23
JMTL850P04A from Jiangsu JieJie Microelectronics, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±20 V, threshold -1.0 to -2.5 V at ID=-250μA. |
| 2 | S | passive | Source; continuous drain current -5 A at TA=25℃ (-3.3 A at 100℃), body diode forward current up to -5 A. |
| 3 | D | passive | Drain; drain-source voltage rating -40 V, pulsed drain current -20 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu JieJie Microelectronics |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -40 | V | 1 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | -5 | A | TA = 25℃ | 1 | ||
| Continuous Drain Current | ID | -3.3 | A | TA = 100℃ | 1 | ||
| Pulsed Drain Current | IDM | -20 | A | 1 | |||
| Power Dissipation | PD | 3.8 | W | TA = 25℃ | 1 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 32.9 | ℃/W | 1 | |||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | ℃ | 1 | ||
| Drain-Source Breakdown Voltage | V(BR)DSS | -40 | V | VGS=0V, ID= -250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | μA | VDS= -40V, VGS=0V | 2 | ||
| Gate to Body Leakage Current | IGSS | -100 | 100 | nA | VDS=0V, VGS= ±20V | 2 | |
| Gate Threshold Voltage | VGS(th) | -1 | -1.6 | -2.5 | V | VDS=VGS, ID= -250μA | 2 |
| Static Drain-Source on-Resistance | RDS(on) | 70 | 90 | mΩ | VGS= -10V, ID= -3A | 2 | |
| Static Drain-Source on-Resistance | RDS(on) | 90 | 125 | mΩ | VGS= -4.5V, ID= -2A | 2 | |
| Maximum Continuous Drain to Source Diode Forward Current | IS | -5 | A | 2 | |||
| Maximum Pulsed Drain to Source Diode Forward Current | ISM | -20 | A | 2 | |||
| Drain to Source Diode Forward Voltage | VSD | -0.8 | -1.2 | V | VGS=0V, IS= -5A | 2 |
CAD (KiCad official)
- Symbol:
JMTL850P04A - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
jmtl850p04a-etched.step/jmtl850p04a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jmtl850p04a.step/jmtl850p04a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu JieJie Microelectronics datasheet (7 pp, sha256
0da4613b2e49123a, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).