component
JMTL400N04A
Public Made by Adomby adom
Jiangsu JieJie Microelectronics MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownJMTL400N04A
Jiangsu JieJie Microelectronics · MOSFETs · SOT-23
JMTL400N04A from Jiangsu JieJie Microelectronics, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-to-source voltage limited to ±20V, with a typical threshold of 1.9V (1.3V min, 2.3V max) at ID = 250µA. |
| 2 | S | passive | Source; continuous drain current up to 5A at TA = 25°C (3A at TA = 100°C) and body diode forward current up to 5A. |
| 3 | D | passive | Drain; drain-to-source voltage rated 40V, continuous current 5A and pulsed current 20A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu JieJie Microelectronics |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | V(BR)DSS | 40 | V | ID = 250µA, VGS = 0V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 40V, VGS = 0V | 2 | ||
| Gate-Body Leakage Current | IGSS | -100 | 100 | nA | VDS = 0V, VGS = ±20V | 2 | |
| Gate Threshold Voltage | VGS(th) | 1.3 | 1.9 | 2.3 | V | VDS = VGS, ID = 250µA | 2 |
| Static Drain-Source ON-Resistance (first table row) | RDS(ON) | 30 | 39 | mΩ | VGS = 10V, ID = 4A | 2 | |
| Static Drain-Source ON-Resistance (second table row) | RDS(ON) | 40 | 52 | mΩ | VGS = 4.5V, ID = 3A | 2 | |
| Maximum Continuous Drain to Source Diode Forward Current | IS | 5 | A | 2 | |||
| Maximum Pulsed Drain to Source Diode Forward Current | ISM | 20 | A | 2 | |||
| Drain to Source Diode Forward Voltage | VSD | 1.2 | V | VGS = 0V, IS = 5A | 2 | ||
| Drain-to-Source Voltage | VDS | 40 | V | 1 | |||
| Gate-to-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 5 | A | TA = 25°C | 1 | ||
| Continuous Drain Current | ID | 3 | A | TA = 100°C | 1 | ||
| Pulsed Drain Current | IDM | 20 | A | Note 1: repetitive rating, pulse width limited by maximum junction temperature | 1 | ||
| Power Dissipation | PD | 1.3 | W | TA = 25°C | 1 | ||
| Junction & Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 100 | °C/W | Note 2: device mounted on 1 inch² pad of 2oz copper FR4 PCB | 1 |
CAD (KiCad official)
- Symbol:
JMTL400N04A - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
jmtl400n04a-etched.step/jmtl400n04a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jmtl400n04a.step/jmtl400n04a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu JieJie Microelectronics datasheet (6 pp, sha256
e66ef0ef9a1608fa, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).