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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

JL7018F8

JieLi Tech · Digital Signal Processors (DSP/DSC) · QFN-40(5x5)

JL7018F8 from JieLi Tech, in a QFN-40(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DACRN	output	Differential DAC Right Negative channel output for audio playback.
2	DACRP	output	Differential DAC Right Positive channel output for audio playback.
3	DACLN	output	Differential DAC Left Negative channel output for audio playback.
4	DACLP	output	Differential DAC Left Positive channel output for audio playback.
5	HPVDD	power_in	Audio power supply input with absolute maximum rating of 3V.
6	PE5	bidirectional	GPIO with SD card power supply control and SPI4/SPI0 data interface functions.
7	PG8	bidirectional	GPIO with MIC2 differential input, MIC2 bias output, ADC15 and AMUX_C0 analog channel functions.
8	PG7	bidirectional	GPIO with MIC2 bias output, MIC2 negative differential input, ADC15 and AMUX_C1 analog channel functions.
9	PG6	bidirectional	GPIO with MIC3 differential input, AMUX_D0 analog channel and fault detect input functions.
10	PG5	bidirectional	GPIO with MIC3 bias output, MIC3 negative differential input, ADC14, AMUX_D1 and Timer3 clock functions.
11	PGND	power_in	Ground reference pin for Buck DC-DC converter.
12	SW	power_out	Buck converter switch signal output connected to external inductor.
13	VBAT	power_in	Battery power supply input, 2.2V to 4.5V range with 200mA max charging current.
14	VPWR	power_in	Charging power input (4.5V to 5.5V) with alternate GPIO functions including UART0, PWM3 and Timer1 capture.
15	IOVDD	power_out	Built-in LDO linear regulator output at 3.0V nominal, supporting up to 200mA loading current.
16	DCVDD	power_in	Internal digital core power supply at 1.25V nominal.
17	PB8	bidirectional	High voltage resistant GPIO with 1.1V EVDD supply reference and Timer4 capture function.
18	PB4	bidirectional	High voltage resistant GPIO with low power touch channel 3, clock output, SPI4, IIC1 and UART3 functions.
19	PB2	bidirectional	High voltage resistant GPIO with low power touch channel 2, SPI4 clock, ADC7, UART3 and Timer5 capture.
20	PB1	bidirectional	High voltage resistant GPIO with hold-down reset function, low power touch channel 1 and ADC6 input.
21	BTRF	bidirectional	Bluetooth RF antenna interface for wireless communication.
22	XOSCI	input	System 24MHz crystal oscillator input.
23	XOSCO	output	System 24MHz crystal oscillator output.
24	PC5	bidirectional	GPIO with SPI0, SD0 clock, IIC0 SDA, Audio Link data3, ADC5 and UART2 interface functions.
25	PC4	bidirectional	GPIO with SPI0, SD0 command, IIC0 SCL, Audio Link data2, ADC4, UART2 and Timer4 PWM functions.
26	PC3	bidirectional	GPIO with SPI0 chip select, SD0 data output, Audio Link word select and Timer3 clock input functions.
27	PC2	bidirectional	GPIO with SPI0 data output, Audio Link serial clock and Timer1 clock input functions.
28	PC1	bidirectional	GPIO with SPI0 clock, Audio Link data1, Timer5 clock and PWM channel 1 low side functions.
29	USBDM	bidirectional	USB negative data pin with pull-down resistor; supports SPI2, SD, IIC0, ADC11 and UART1 functions.
30	USBDP	bidirectional	USB positive data pin with pull-down resistor; supports SPI2, SD, IIC0, ADC10 and UART1 functions.
31	PA6	bidirectional	GPIO with Audio Link data0, SPI2 output, ADC2 and UART0 interface functions.
32	PA5	bidirectional	GPIO with Audio Link data2, SPI2 clock, ADC1 and UART0 interface functions.
33	PA4	bidirectional	GPIO with MIC1 bias output, MIC1 negative differential input, SPI2, Audio Link data1 and Timer2 capture.
34	PA3	bidirectional	GPIO with MIC1 positive differential input, SPI1 output, Audio Link data0 and Timer1 PWM output.
35	PA2	bidirectional	GPIO with MIC0 bias output, SPI1 clock, Audio Link master clock, UART1 and Timer3 capture functions.
36	PA1	bidirectional	GPIO with MIC0 positive differential input, SPI1 input, UART1 and Timer0 PWM output functions.
37	PA0	bidirectional	GPIO with MIC power supply output and ADC0 analog input functions.
38	ACM	power_in	Audio analog reference bias supply for DAC circuit.
39	AVSS	power_in	Audio analog ground reference for ADC and DAC circuits.
40	VCM	power_in	Audio ADC/DAC common reference voltage.
41	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	JieLi Tech
Package	QFN-40(5x5)
Category	Embedded Processors & Controllers
Pins	41

CAD (KiCad official)

Symbol: JL7018F8
Footprint: Package_DFN_QFN:QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm
3D model: QFN-40(5x5) (KiCad packages3D, STEP)
3D model files: jl7018f8-etched.step / jl7018f8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); jl7018f8.step / jl7018f8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: JieLi Tech datasheet (19 pp, sha256 f42580bebda357dc, retrieved 2026-09-21, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF