component
JHT8563ARZ
Public Made by Adomby adom
JYJE Real Time Clocks, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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JHT8563ARZ
JYJE · Real Time Clocks · SOP-8
JHT8563ARZ from JYJE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OSCI | input | Pin for connection of the 32.768 kHz quartz resonator, with the internal oscillator load stated as 12 pF; it can also be driven by an external 32.768 kHz oscillator. |
| 2 | OSCO | passive | Pin for connection of the 32.768 kHz quartz resonator, and it is left unconnected when OSCI is driven by an external oscillator. |
| 3 | INT | output | Interrupt output that goes active on an alarm match or timer countdown to 0, giving a continuous signal for alarm and a continuous or pulsed signal for timer, depending on TI/TP. |
| 4 | VSS | power_in | Common (ground) pin, with all voltages specified relative to this ground. |
| 5 | SDA | bidirectional | Serial data input/output of the double-wire I2C-bus; it is an open-drain output that requires an external pull-up resistor. |
| 6 | SCL | input | Serial clock input that synchronises data transfer on the double-wire bus, with a maximum clock frequency of 400 kHz. |
| 7 | CLKOUT | output | Frequency divider output producing 32.768 kHz, 8.192 kHz, 4.096 kHz or 1 Hz when enabled by FE; it is open-drain and requires an external pull-up resistor. |
| 8 | VDD | power_in | Supply pin, with the datasheet stating a supply range of 1.0 to 5.5 V for timekeeping and 1.8 to 5.5 V for I2C bus access. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JYJE |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | 1 | 5.5 | V | 3 | ||
| Supply voltage | VDD | -0.5 | 6.5 | V | 3 | ||
| Input voltage SCL, SDA, OSCI | VI | 0 | 5.5 | V | 3 | ||
| Input voltage SCL, SDA, OSCI | VI | -0.5 | 6.5 | V | 3 | ||
| Output voltage CLKOUT, INT | VO | 0 | 5.5 | V | 3 | ||
| Output voltage CLKOUT, INT | VO | -0.5 | 6.5 | V | 3 | ||
| Dissipated power | Ptot | 300 | mWt | 3 | |||
| Direct input or output current via any pin | IIO | -10 | 10 | mA | 3 | ||
| Operating temperature range | TA | -40 | 85 | C | 3 | ||
| Supply voltage (I2C bus active) | VDD | 1.8 | 5.5 | V | I2C bus -active; FSCL = 400 kHz | 3 | |
| Supply voltage (non-active mode) | VDD | 1 | 5.5 | V | in the non-active mode | 3 | |
| Input leakage current | ILI | 1 | µA | VIN =VDD; VIN =VSS | 3 | ||
| Output leakage current | ILO | 1 | µA | VOUT =VDD; VOUT =VSS | 3 | ||
| Consumption current | IDD1 | 800 | µA | CLKOUT-off, FSCL =400 kHz | 3 | ||
| Consumption current | IDD1 | 200 | µA | CLKOUT-off, FSCL =100 kHz | 3 | ||
| Consumption current | IDD1 | 0.55 | µA | CLKOUT-off, FSCL =0 kHz, VDD=5V | 3 | ||
| Consumption current | IDD1 | 0.45 | µA | CLKOUT-off, FSCL =0 kHz, VDD=2V | 3 | ||
| Cycle frequency SCL | fSCL | 0 | 400 | kHz | 4 | ||
| Time of bus vacant condition between STOP and START | tBUF | 4.7 | usec | 4 | |||
| Hold time (repeated) of the condition START | tHD:STA | 0.6 | usec | 4 | |||
| Low condition duration of the cycle pulse SCL | tLOW | 1.3 | usec | 4 | |||
| High condition duration of the cycle pulse SCL | tHIGH | 0.6 | usec | 4 | |||
| Presetting time for the repeated condition START | tSU:STA | 0.6 | usec | 4 | |||
| Data hold time | tHD:DAT | 0 | usec | 4 | |||
| Data presetting time | tSU:DAT | 100 | nsec | 4 | |||
| Rise time for signals SDA and SCL | tR | 300 | nsec | 4 | |||
| Drop time for signals SDA and SCL | tF | 300 | nsec | 4 | |||
| Presetting time for the condition STOP | tSU:STO | 0.6 | usec | 4 | |||
| Total capacitance load on each bus line | CB | 400 | pF | 4 | |||
| Capacity input/output | CI/O | 10 | 10 | pF | 4 | ||
| Load capacitance of the quartz resonator | CLX | 12.5 | 12.5 | pF | 4 |
CAD (KiCad official)
- Symbol:
JHT8563ARZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
jht8563arz-etched.step/jht8563arz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jht8563arz.step/jht8563arz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JYJE datasheet (12 pp, sha256
40419dc5db86a5f4, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).