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JHT1307ARZ
Public Made by Adomby adom
JYJE Real Time Clocks, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownJHT1307ARZ
JYJE · Real Time Clocks · SOP-8
JHT1307ARZ from JYJE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X1 | input | Pin for connection of the quartz resonator, with the resonator load capacitance CLX specified at 12.5 pF. |
| 2 | X2 | input | Pin for connection of the quartz resonator, with the resonator load capacitance CLX specified at 12.5 pF. |
| 3 | VBAT | power_in | Battery supply pin; operating battery voltage is 2.0 V to 3.5 V, with an absolute maximum of 7.0 V. |
| 4 | GND | power_in | Ground pin; all voltages are specified relative to ground. |
| 5 | SDA | bidirectional | Input/output of serial data for the two-wire bus; low-level output voltage is at most 0.4 V at 5 mA load, and the total I/O capacitance is at most 10 pF. |
| 6 | SCL | input | Input of the serial clock for the two-wire bus; cycle frequency is 0 to 100 kHz, with VIH of 2.2 V minimum and VIL of 0.8 V maximum. |
| 7 | SQW/OUT | output | Programmable rectangular output signal (1 Hz, 4.096 kHz, 8.192 kHz or 32.768 kHz, selected by the control register); low-level output voltage is at most 0.4 V. |
| 8 | VCC | power_in | Main power supply pin; operating range is 4.5 V to 5.5 V, with an absolute maximum of 7.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JYJE |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.5 | 5.5 | V | 2 | ||
| Battery voltage | VBAT | 2 | 3.5 | V | 2 | ||
| Low level input voltage | VIL | -0.3 | 0.8 | V | 2 | ||
| High level input voltage | VIH | 2.2 | V | 2 | |||
| Operating temperature range | TA | -40 | 85 | °C | 2 | ||
| Supply voltage (limit permissible) | VCC | -0.5 | 7 | V | 2 | ||
| Battery voltage (limit permissible) | VBAT | -0.5 | 7 | V | 2 | ||
| Low level input voltage (limit permissible) | VIL | -0.5 | 7 | V | 2 | ||
| High level input voltage (limit permissible) | VIH | -0.5 | 7 | V | 2 | ||
| Storage temperature | TS | -55 | 125 | °C | 2 | ||
| Input leakage current (SCL only) | ILI | 1 | µA | 2 | |||
| In / Out leakage current (SDA and SQW/OUT) | ILO | 1 | µA | 2 | |||
| Low level output voltage | VOL | 0.4 | V | VCC = 4.5 V | 2 | ||
| Consumption current in the data transfer mode | ICCA | 1500 | µA | fSCL = 100 kHz | 2 | ||
| Consumption current in the static mode | ICCS | 200 | µA | VCC = 5 V and SDA, SCL = 5 V | 2 | ||
| Consumption current in the battery mode (SQW/OUT OFF, 32 kHz ON) | IBAT1 | 0.5 | µA | VCC = 0 V, VBAT = 3 V | 2 | ||
| Consumption current in the battery mode (SQW/OUT ON, 32 kHz ON) | IBAT2 | 0.8 | µA | VCC = 0 V, VBAT = 3 V | 2 | ||
| Cycle frequency SCL | fSCL | 0 | 100 | kHz | 3 | ||
| Time of the bus vacant status between STOP and START | tBUF | 4.7 | µsec | 3 | |||
| Hold time (repeated) of START status | tHD:STA | 4 | µsec | 3 | |||
| Duration of the low status of the cycle pulse SCL | tLOW | 4.7 | µsec | 3 | |||
| Duration of the cycle pulse high status SCL | tHIGH | 4 | µsec | 3 | |||
| Pre-set time for the repeated status START | tSU:STA | 4.7 | µsec | 3 | |||
| Data hold time | tHD:DAT | 0 | µsec | 3 | |||
| Data pre-set time | tSU:DAT | 250 | nsec | 3 | |||
| Rise time of signals SDA and SCL | tR | 1000 | nsec | 3 | |||
| Drop time of signals SDA and SCL | tF | 300 | nsec | 3 | |||
| Pre-set time for the status STOP | tSU:STO | 4.7 | µsec | 3 | |||
| Total capacitance load per each bus line | CB | 400 | pF | 3 | |||
| IN / OUT capacitance | CI/O | 10 | 10 | pF | 3 | ||
| Load capacitance of the quartz resonator | CLX | 12.5 | 12.5 | pF | 3 |
CAD (KiCad official)
- Symbol:
JHT1307ARZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
jht1307arz-etched.step/jht1307arz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jht1307arz.step/jht1307arz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JYJE datasheet (9 pp, sha256
334a0b5a305fad12, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).