component
JEB05VCDF
Public Made by Adomby adom
Jiangsu JieJie Microelectronics ESD Protection Devices, DFN1006-2L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| jeb05vcdf-etched.glb | 13d ago |
| jeb05vcdf-etched.step | 13d ago |
| jeb05vcdf-hero.glb | 13d ago |
| jeb05vcdf-hero.overlay.json | 13d ago |
| jeb05vcdf.glb | 13d ago |
| jeb05vcdf.kicad_mod | 13d ago |
| jeb05vcdf.kicad_sym | 13d ago |
| jeb05vcdf.lbr | 13d ago |
| jeb05vcdf.step | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
JEB05VCDF
Jiangsu JieJie Microelectronics · ESD Protection Devices · DFN1006-2L
JEB05VCDF from Jiangsu JieJie Microelectronics, in a DFN1006-2L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Bi-directional ESD/TVS protection terminal (I/O line, 5.0V reverse working voltage, 6.0V min breakdown at 1mA); interchangeable with pin 2. |
| 2 | 2 | passive | Bi-directional ESD/TVS protection terminal (I/O line or ground reference, 5.0V reverse working voltage); interchangeable with pin 1. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu JieJie Microelectronics |
| Package | DFN1006-2L |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak pulse power dissipation | PPP | 60 | W | 8/20μs waveform | 2 | ||
| ESD per IEC 61000-4-2 (Air) | VESD | -25 | 25 | kV | ESD per IEC 61000-4-2 (Air) | 2 | |
| ESD per IEC 61000-4-2 (Contact) | VESD | -25 | 25 | kV | ESD per IEC 61000-4-2 (Contact) | 2 | |
| Lead soldering temperature | TL | 260 | ℃ | 10 sec. | 2 | ||
| Operating junction temperature range | TJ | -55 | 125 | ℃ | 2 | ||
| Storage temperature range | TSTG | -55 | 150 | ℃ | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | polyester | The cover tape is a multilayer film(heat activated adhesive in nature)primarily composed of polyester film, adhesive | 5 |
CAD (KiCad official)
- Symbol:
JEB05VCDF - Footprint:
Diode_SMD:D_SOD-882 - 3D model: DFN1006-2L (KiCad packages3D, STEP)
- 3D model files:
jeb05vcdf-etched.step/jeb05vcdf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);jeb05vcdf.step/jeb05vcdf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu JieJie Microelectronics datasheet (6 pp, sha256
07f92138bfa80977, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).