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IXDN604SITR

IXYS · Gate Drive ICs · SOIC-8-EP

IXDN604SITR from IXYS, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection on the IXDN604 (pin 1 is NC in the pin configuration).
2 INA input Channel A logic input; VIH min 3.0V and VIL max 0.8V at 4.5V<VCC<18V, withstands -5V to VCC+0.3V.
3 GND power_in Ground, the common ground reference for the device.
4 INB input Channel B logic input; VIH min 3.0V and VIL max 0.8V at 4.5V<VCC<18V, withstands -5V to VCC+0.3V.
5 OUTB output Channel B output that sources or sinks up to 4A to turn a discrete MOSFET or IGBT on or off (non-inverting).
6 VCC power_in Supply voltage powering the device, recommended 4.5V to 35V (absolute maximum 40V).
7 OUTA output Channel A output that sources or sinks up to 4A to turn a discrete MOSFET or IGBT on or off (non-inverting).
8 NC unconnected No internal connection on the IXDN604 (pin 8 is NC in the pin configuration).
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer IXYS
Package SOIC-8-EP
Category Power Management ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage, High VIH 3 V 4.5V < VCC < 18V, TA=25°C 4
Input Voltage, Low VIL 0.8 V 4.5V < VCC < 18V, TA=25°C 4
Input Current IIN -10 10 µA 0V < VIN < VCC, TA=25°C 4
Output Voltage, Low VOL 0.025 V TA=25°C 4
Output Resistance, High State ROH 1.3 2.5 Ω VCC=18V, IOUT=-10mA, TA=25°C 4
Output Resistance, Low State ROL 1.1 2 Ω VCC=18V, IOUT=10mA, TA=25°C 4
Output Current, Continuous IDC -1 1 A Limited by package power dissipation, TA=25°C 4
Rise Time tr 9 16 ns VCC=18V, CLOAD=1000pF, TA=25°C 4
Fall Time tf 8 14 ns VCC=18V, CLOAD=1000pF, TA=25°C 4
On-Time Propagation Delay tondly 29 50 ns VCC=18V, CLOAD=1000pF, TA=25°C 4
Off-Time Propagation Delay toffdly 35 50 ns VCC=18V, CLOAD=1000pF, TA=25°C 4
Power Supply Current, VIN=3.5V ICC 1 3 mA VCC=18V, VIN=3.5V, TA=25°C 4
Power Supply Current, VIN=0V ICC 10 µA VCC=18V, VIN=0V, TA=25°C 4
Power Supply Current, VIN=VCC ICC 10 µA VCC=18V, VIN=VCC, TA=25°C 4
Input Voltage, High (full temp) VIH 3.3 V 4.5V < VCC < 18V, -40°C < TA < +125°C 4
Input Voltage, Low (full temp) VIL 0.65 V 4.5V < VCC < 18V, -40°C < TA < +125°C 4
Input Current (full temp) IIN -10 10 µA 0V < VIN < VCC, -40°C < TA < +125°C 4
Output Voltage, Low (full temp) VOL 0.025 V -40°C < TA < +125°C 4
Output Resistance, High State (full temp) ROH 3 Ω VCC=18V, IOUT=-10mA, -40°C < TA < +125°C 4
Output Resistance, Low State (full temp) ROL 2.5 Ω VCC=18V, IOUT=10mA, -40°C < TA < +125°C 4
Output Current, Continuous (full temp) IDC -1 1 A Limited by package power dissipation, -40°C < TA < +125°C 4
Rise Time (full temp) tr 16 ns VCC=18V, CLOAD=1000pF, -40°C < TA < +125°C 4
Fall Time (full temp) tf 14 ns VCC=18V, CLOAD=1000pF, -40°C < TA < +125°C 4
On-Time Propagation Delay (full temp) tondly 65 ns VCC=18V, CLOAD=1000pF, -40°C < TA < +125°C 4
Off-Time Propagation Delay (full temp) toffdly 65 ns VCC=18V, CLOAD=1000pF, -40°C < TA < +125°C 4
Power Supply Current, VIN=3.5V (full temp) ICC 3.5 mA VCC=18V, VIN=3.5V, -40°C < TA < +125°C 4
Power Supply Current, VIN=0V (full temp) ICC 150 µA VCC=18V, VIN=0V, -40°C < TA < +125°C 4
Power Supply Current, VIN=VCC (full temp) ICC 150 µA VCC=18V, VIN=VCC, -40°C < TA < +125°C 4
Supply Voltage (abs max) VCC -0.3 40 V 25°C 3
Input Voltage (abs max) VINx, VENx -5 V Max is VCC+0.3 3
Output Current (abs max) IOUT 4 A printed ±4 3
Output Pulsed Current (abs max) Iout_pulsed 5 A 0.5µs, printed ±5 3
Junction Temperature TJ -55 150 °C 3
Storage Temperature TSTG -65 150 °C 3
Supply Voltage (recommended) VCC 4.5 35 V 3
Operating Temperature Range TA -40 125 °C 3
Thermal Resistance, Junction-to-Ambient θJA 85 °C/W SI (8-Pin Power SOIC) 5
Thermal Resistance, Junction-to-Case θJC 10 °C/W SI (8-Pin Power SOIC) 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Circuits Division classifies its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of prod 10

CAD (KiCad official)

  • Symbol: IXDN604SITR
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: ixdn604sitr-etched.step / ixdn604sitr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ixdn604sitr.step / ixdn604sitr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: IXYS datasheet (13 pp, sha256 25fcf3039d3740fc, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF