component

ITA6V1U1RL

Public Made by Adom

by adom

STMicroelectronics ESD And Surge Protection (TVS/ESD), SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentcircuit protectionita6v1u1rlfactory-2.0.0extractor-text

Verified ITA6V1U1RL

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ITA6V1U1RL · SO-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 8-page datasheet
  • ✓distributor: lcsc C1974275, digikey 497-3407-2-ND, mouser 511-ITA6V1U1-TR
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-938u65fh/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ita6v1u1rl.kicad_sym✓ ita6v1u1rl.kicad_mod✓ ita6v1u1rl.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2h ago
viewers ita6v1u1rl: viewers · Ray 2h ago
ita6v1u1rl-etched.glb Publish 0.1.0 · Ray 2h ago
ita6v1u1rl-etched.step ita6v1u1rl: factory component page (tier=mfr) · Ray 2h ago
ita6v1u1rl-hero.glb ita6v1u1rl: hero GLB from the etched model (keeps the MPN mark) · Ray 2h ago
ita6v1u1rl-hero.overlay.json Publish 0.1.0 · Ray 2h ago
ita6v1u1rl.glb Publish 0.1.0 · Ray 2h ago
ita6v1u1rl.kicad_mod Publish 0.1.0 · Ray 2h ago
ita6v1u1rl.kicad_sym Publish 0.1.0 · Ray 2h ago
ita6v1u1rl.lbr Publish 0.1.0 · Ray 2h ago
ita6v1u1rl.step Publish 0.1.0 · Ray 2h ago
package.json Publish 0.1.0 · Ray 2h ago
page.json Set visibility: public · Ray 2h ago
README.md Publish 0.1.0 · Ray 2h ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 2h ago

ITA6V1U1RL

STMicroelectronics · ESD And Surge Protection (TVS/ESD) · SO-8

ITA6V1U1RL from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O1 bidirectional Transil line protection terminal, bidirectional, clamping overvoltages on the data line relative to GND with 40 A peak pulse current (8/20 µs) rating for the device.
2 I/O2 bidirectional Transil line protection terminal, bidirectional, clamping overvoltages on the data line relative to GND with 40 A peak pulse current (8/20 µs) rating for the device.
3 I/O3 bidirectional Transil line protection terminal, bidirectional, clamping overvoltages on the data line relative to GND with 40 A peak pulse current (8/20 µs) rating for the device.
4 I/O4 bidirectional Transil line protection terminal, bidirectional, clamping overvoltages on the data line relative to GND with 40 A peak pulse current (8/20 µs) rating for the device.
5 GND power_in Ground reference for the Transil clamps; the datasheet gives no separate electrical limit for this pin.
6 GND power_in Ground reference for the Transil clamps; the datasheet gives no separate electrical limit for this pin.
7 I/O5 bidirectional Transil line protection terminal, bidirectional, clamping overvoltages on the data line relative to GND with 40 A peak pulse current (8/20 µs) rating for the device.
8 I/O6 bidirectional Transil line protection terminal, bidirectional, clamping overvoltages on the data line relative to GND with 40 A peak pulse current (8/20 µs) rating for the device.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Circuit Protection
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Breakdown voltage VBR 6.51 V @ IR = 1 mA 2
Leakage current IRM 10 µA @ VRM = 5 V 2
Clamping voltage VCL 10 V @ IPP = 10 A, 8/20 µs 2
Clamping voltage VCL 12 V @ IPP = 25 A, 8/20 µs 2
Voltage temperature coefficient αT 4 10-4/°C 2
Peak pulse power (8/20 µs) PPP 300 W Tj initial = Tamb 2
Peak pulse current (8/20 µs) IPP 40 A Tj initial = Tamb 2
Wire I2t value I2t 0.6 A2s 2
Maximum operating junction temperature Tj 125 °C 2
Storage temperature range Tstg -55 150 °C 2
Maximum lead temperature for soldering TL 260 °C during 10 s 2

CAD (KiCad official)

  • Symbol: ITA6V1U1RL
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: ita6v1u1rl-etched.step / ita6v1u1rl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ita6v1u1rl.step / ita6v1u1rl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (8 pp, sha256 3238864925080809, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF