component
ISPPAC-POWR607-01SN24I
Public Made by Adomby adom
Lattice Monitors & Reset Circuits, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "isppac-powr607-01sn24i",
"version": "0.1.0",
"type": "component",
"description": "Lattice Monitors & Reset Circuits, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management ics",
"isppac-powr607-01sn24i",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
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"files": [
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"README.md",
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"isppac-powr607-01sn24i.kicad_mod",
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"isppac-powr607-01sn24i.step",
"isppac-powr607-01sn24i.lbr",
"docs/hero.png",
"docs/isppac-powr607-01sn24i-datasheet.pdf",
"viewers/symbol.html",
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"isppac-powr607-01sn24i-hero.overlay.json",
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],
"component": {
"mpn": "ISPPAC-POWR607-01SN24I",
"manufacturer": "Lattice",
"package": "QFN-24-EP(4x4)",
"pin_count": 25,
"category": "Power Management ICs",
"subcategory": "Monitors & Reset Circuits",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/21411ab654f9fe4d7813205e8fad3452.pdf",
"parts": {
"symbol": "isppac-powr607-01sn24i.kicad_sym",
"footprint": "isppac-powr607-01sn24i.kicad_mod",
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"model_3d_step": "isppac-powr607-01sn24i-etched.step",
"model_3d_step_plain": "isppac-powr607-01sn24i.step",
"lbr": "isppac-powr607-01sn24i.lbr"
},
"distributor_links": {
"lcsc": "C1519384",
"digikey": "220-2034-ND",
"mouser": "842-ISPPACPOWR60701S"
},
"distributor_check": {
"checked_at": "2026-10-30T22:42:31Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "220-2034-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "842-ISPPACPOWR60701S",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VMON1",
"type": "input",
"description": "Analog voltage monitor input rated -0.3 V to 5.9 V that can be biased independently from VCC; tie to GND if unused."
},
{
"number": "2",
"name": "VMON2",
"type": "input",
"description": "Analog voltage monitor input rated -0.3 V to 5.9 V that can be biased independently from VCC; tie to GND if unused."
},
{
"number": "3",
"name": "VCC",
"type": "power_in",
"description": "Core supply pin, 2.64 V to 3.96 V; both VCC pins (3 and 16) must be connected together on the board."
},
{
"number": "4",
"name": "VMON3",
"type": "input",
"description": "Analog voltage monitor input rated -0.3 V to 5.9 V that can be biased independently from VCC; tie to GND if unused."
},
{
"number": "5",
"name": "VMON4",
"type": "input",
"description": "Analog voltage monitor input rated -0.3 V to 5.9 V that can be biased independently from VCC; tie to GND if unused."
},
{
"number": "6",
"name": "VMON5",
"type": "input",
"description": "Analog voltage monitor input rated -0.3 V to 5.9 V that can be biased independently from VCC; tie to GND if unused."
},
{
"number": "7",
"name": "VMON6",
"type": "input",
"description": "Analog voltage monitor input rated -0.3 V to 5.9 V that can be biased independently from VCC; tie to GND if unused."
},
{
"number": "8",
"name": "GND",
"type": "power_in",
"description": "Ground; all GND pins must be connected together on the circuit board."
},
{
"number": "9",
"name": "GND",
"type": "power_in",
"description": "Ground; all GND pins must be connected together on the circuit board."
},
{
"number": "10",
"name": "VCCJ",
"type": "power_in",
"description": "JTAG logic interface supply, 2.25 V to 3.6 V; it is pulled to GND in power-down mode, so it must be left open whenever power-down is initiated."
},
{
"number": "11",
"name": "TDO",
"type": "output",
"description": "JTAG test data output, 0 V to 5.5 V."
},
{
"number": "12",
"name": "TCK",
"type": "input",
"description": "JTAG test clock input, 0 V to 5.5 V."
},
{
"number": "13",
"name": "TDI",
"type": "input",
"description": "JTAG test data input, 0 V to 5.5 V, with an internal pull-up."
},
{
"number": "14",
"name": "TMS",
"type": "input",
"description": "JTAG test mode select input, 0 V to 5.5 V, with an internal pull-up."
},
{
"number": "15",
"name": "IN_OUT7",
"type": "bidirectional",
"description": "Digital input 0 V to 5.5 V (PLD input 7, thresholds referenced to VCC) or open-drain output 7 that requires an external pull-up to a supply."
},
{
"number": "16",
"name": "VCC",
"type": "power_in",
"description": "Core supply pin, 2.64 V to 3.96 V; both VCC pins (3 and 16) must be connected together on the board."
},
{
"number": "17",
"name": "IN_OUT6",
"type": "bidirectional",
"description": "Digital input 0 V to 5.5 V (PLD input 6, thresholds referenced to VCC) or open-drain output 6 that requires an external pull-up to a supply."
},
{
"number": "18",
"name": "IN_OUT5",
"type": "bidirectional",
"description": "Digital input 0 V to 5.5 V (PLD input 5, thresholds referenced to VCC) or open-drain output 5 that requires an external pull-up to a supply."
},
{
"number": "19",
"name": "IN_OUT4",
"type": "bidirectional",
"description": "Digital input 0 V to 5.5 V (PLD input 4, thresholds referenced to VCC) or open-drain output 4 that requires an external pull-up to a supply."
},
{
"number": "20",
"name": "IN_OUT3",
"type": "bidirectional",
"description": "Digital input 0 V to 5.5 V (PLD input 3, thresholds referenced to VCC) or open-drain output 3 that requires an external pull-up to a supply."
},
{
"number": "21",
"name": "IN2",
"type": "input",
"description": "PLD logic input 2 rated 0 V to 5.5 V with thresholds referenced to VCC; tie to GND when not used."
},
{
"number": "22",
"name": "IN1_PWRDN",
"type": "input",
"description": "PLD logic input 1 rated 0 V to 5.5 V that can serve as the power-down input (low enters, high exits power-down); pull down with a 10 k resistor when not used."
},
{
"number": "23",
"name": "HVOUT1",
"type": "output",
"description": "Open-drain output rated 0 V to 10 V, or high-voltage FET gate driver rated 0 V to 9 V; open-drain mode requires an external pull-up to a supply."
},
{
"number": "24",
"name": "HVOUT2",
"type": "output",
"description": "Open-drain output rated 0 V to 10 V, or high-voltage FET gate driver rated 0 V to 9 V; open-drain mode requires an external pull-up to a supply."
},
{
"number": "25",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed die pad on the bottom of the 24-pin QFNS is not given a printed pin number in the pin ta; These pins are dual-function (open-drain output or high-voltage FET driver for HVOUT1/2; PLD input o; VMON pins are analog inputs. The schema has no analog type, so they are typed as input.",
"exposed pad 25 added from the footprint"
],
"pages_sent": 9,
"cost_usd": 0.0654,
"at": "2026-10-30T22:42:10"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/21411ab654f9fe4d7813205e8fad3452.pdf",
"pages": 29,
"sha256": "f166d58af267941a",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 25,
"described": 25,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"models_3d": [
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"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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4.0,
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"zmin_mm": 0.0,
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"footprint_binding": "identity",
"sha256": "096fc110543e6d324c5120c2d38e3dca87a389da9b6fac234f1fe40856295ef4",
"checked": "2026-10-30",
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},
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"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"sha256": "c5b2ae06be1979d1afe6b0aab84b81d0175e7423889aea105fbafbc19d589ca9",
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}
}