component
ISP752RFUMA1
Public Made by Adomby adom
Infineon Technologies Power Distribution Switches, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ISP752RFUMA1
Infineon Technologies · Power Distribution Switches · SOIC-8
ISP752RFUMA1 from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Logic ground; reverse battery protection requires an external 150 Ω resistor in the GND connection. |
| 2 | IN | input | Input that activates the power switch on a logic high signal; continuous input voltage is -10 to +16 V and DC input current is limited to ±5 mA. |
| 3 | OUT | power_out | Output to the load, self-limited in short circuit; the inductive switch-off output clamp VON(CL) is 59 V min. |
| 4 | ST | output | Open-drain diagnostic feedback for overtemperature and short circuit; VST(low) is 0.4 V max at Tj = -40°C to +25°C and IST = 1.6 mA. |
| 5 | Vbb | power_in | Positive power supply voltage; operating voltage 6 to 52 V, absolute maximum supply voltage 52 V. |
| 6 | Vbb | power_in | Positive power supply voltage; operating voltage 6 to 52 V, absolute maximum supply voltage 52 V. |
| 7 | Vbb | power_in | Positive power supply voltage; operating voltage 6 to 52 V, absolute maximum supply voltage 52 V. |
| 8 | Vbb | power_in | Positive power supply voltage; operating voltage 6 to 52 V, absolute maximum supply voltage 52 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | Vbb | 52 | V | 6 | |||
| Supply voltage for full short circuit protection | Vbb(SC) | 50 | V | 6 | |||
| Continuous input voltage | VIN | -10 | 16 | V | 6 | ||
| Current through input pin (DC) | IIN | -5 | 5 | mA | 6 | ||
| Junction temperature | Tj | 150 | °C | 6 | |||
| Operating temperature | Ta | -30 | 85 | °C | 6 | ||
| Storage temperature | Tstg | -40 | 105 | °C | 6 | ||
| Power dissipation | Ptot | 1.5 | W | Device on 50 mm × 50 mm × 1.5 mm FR4 PCB, 6 cm² Cu (note 1) | 6 | ||
| Inductive load switch-off energy dissipation (single pulse) | EAS | 125 | mJ | Tj = 150°C, IL = 1 A (note 1, 2) | 6 | ||
| Load dump protection | VLoaddump | 73.5 | V | RL = 13.5 Ω, td = 400 ms, VIN = low or high, VA = 13.5 V (notes 2, 3) | 6 | ||
| Load dump protection | VLoaddump | 83.5 | V | RL = 27 Ω, td = 400 ms, VIN = low or high, VA = 13.5 V (notes 2, 3) | 6 | ||
| Electrostatic discharge voltage (HBM) OUT pin | VESD | -6 | 6 | kV | ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF), OUT | 6 | |
| Electrostatic discharge voltage (HBM) IN pin | VESD | -1 | 1 | kV | ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF), IN | 6 | |
| Electrostatic discharge voltage (HBM) all other pins | VESD | -4 | 4 | kV | ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF), all other pins | 6 | |
| Thermal resistance, minimum footprint | Rth(JA) | 95 | K/W | Minimum footprint | 7 | ||
| Thermal resistance, 6 cm² cooling area | Rth(JA) | 70 | 83 | K/W | 6 cm² cooling area (note 4) | 7 | |
| On-state resistance | RON | 150 | 200 | mΩ | Tj = 25°C, IL = 1 A, Vbb = 9 V to 52 V | 12 | |
| On-state resistance | RON | 270 | 380 | mΩ | Tj = 150°C | 12 | |
| Nominal load current | IL(nom) | 1.3 | 1.7 | A | Device on PCB (note 9), TC = 85°C, Tj ≤ 150°C | 12 | |
| Turn-on time to 90% VOUT | ton | 80 | 180 | µs | RL = 47 Ω | 12 | |
| Turn-off time to 10% VOUT | toff | 80 | 200 | µs | RL = 47 Ω | 12 | |
| Slew rate on 10% to 30% VOUT | dV/dton | 0.7 | 2 | V/µs | RL = 47 Ω, Vbb = 13.5 V | 12 | |
| Slew rate off 70% to 40% VOUT | -dV/dtoff | 0.9 | 2 | V/µs | RL = 47 Ω, Vbb = 13.5 V | 12 | |
| Operating voltage | Vbb(on) | 6 | 52 | V | 12 | ||
| Undervoltage shutoff charge pump | Vbb(under) | 4 | V | Tj = -40°C to +85°C | 12 | ||
| Undervoltage shutoff charge pump | Vbb(under) | 5.5 | V | Tj = 150°C | 12 | ||
| Undervoltage restart of charge pump | Vbb(u cp) | 4 | 5.5 | V | 12 | ||
| Standby current | Ibb(off) | 15 | µA | Tj = -40°C to +85°C, VIN = low | 12 | ||
| Standby current | Ibb(off) | 18 | µA | Tj = 150°C, VIN = low (note 10) | 12 | ||
| Leakage output current (included in Ibb(off)) | IL(off) | 5 | µA | VIN = low | 12 | ||
| Operating current | IGND | 0.8 | 2 | mA | VIN = high | 12 | |
| Initial peak short circuit current limit | IL(SCp) | 9 | A | Tj = -40°C, Vbb = 20 V, tm = 150 µs (pin 5 to 3) | 12 | ||
| Initial peak short circuit current limit | IL(SCp) | 6.5 | A | Tj = 25°C (pin 5 to 3) | 12 | ||
| Repetitive short circuit current limit | IL(SCr) | 4 | A | Tj = 150°C, see Timing diagrams | 13 | ||
| Repetitive short circuit current limit | IL(SCr) | 6 | A | Vbb < 40 V, Tj = Tjt, see Timing diagrams | 13 | ||
| Repetitive short circuit current limit | IL(SCr) | 4.5 | A | Vbb > 40 V, Tj = Tjt, see Timing diagrams | 13 | ||
| Output clamp (inductive load switch off) | VON(CL) | 59 | 63 | V | VOUT = Vbb - VON(CL), Ibb = 4 mA | 13 | |
| Overvoltage protection | Vbb(AZ) | 62 | V | Ibb = 4 mA (note 13) | 13 | ||
| Thermal overload trip temperature | Tjt | 150 | °C | 13 | |||
| Thermal hysteresis | ΔTjt | 10 | K | 13 | |||
| Reverse battery | -Vbb | 52 | V | Requires 150 Ω resistor in GND connection (note 14) | 13 | ||
| Drain-source diode voltage (VOUT > Vbb) | -VON | 600 | mV | Tj = 150°C | 13 | ||
| Input turn-on threshold voltage | VIN(T+) | 2.2 | V | 13 | |||
| Input turn-off threshold voltage | VIN(T-) | 0.8 | V | 13 | |||
| Input threshold hysteresis | ΔVIN(T) | 0.4 | V | 13 | |||
| Off state input current | IIN(off) | 1 | 25 | µA | VIN = 0.7 V | 13 | |
| On state input current | IIN(on) | 3 | 25 | µA | VIN = 5 V | 13 | |
| Status output (open drain), Zener limit voltage | VST(high) | 5.4 | 6.1 | V | IST = 1.6 mA | 13 | |
| Status output (open drain), ST low voltage | VST(low) | 0.4 | V | Tj = -40°C to +25°C, IST = 1.6 mA | 13 | ||
| Status output (open drain), ST low voltage | VST(low) | 0.6 | V | Tj = 150°C, IST = 1.6 mA | 13 | ||
| Status invalid after positive input slope | td(ST+) | 120 | 160 | µs | note 15 | 13 | |
| Status invalid after negative input slope | td(ST-) | 250 | 400 | µs | Vbb = 20 V (note 15) | 14 | |
| Input resistance | RI | 2 | 3.5 | 5 | kΩ | 14 | |
| Short circuit detection voltage | VOUT(SC) | 2.8 | V | 14 | |||
| Open load detection voltage | VOUT(OL) | 3 | 4 | V | note 16 | 14 | |
| Internal output pull down | RO | 200 | kΩ | VOUT(OL) = 4 V (note 17) | 14 |
CAD (KiCad official)
- Symbol:
ISP752RFUMA1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
isp752rfuma1-etched.step/isp752rfuma1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);isp752rfuma1.step/isp752rfuma1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (24 pp, sha256
120fb7f0778fbf6f, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ISP752RFUMA1
**Infineon Technologies** · Power Distribution Switches · SOIC-8
ISP752RFUMA1 from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Logic ground; reverse battery protection requires an external 150 Ω resistor in the GND connection. |
| 2 | IN | input | Input that activates the power switch on a logic high signal; continuous input voltage is -10 to +16 V and DC input current is limited to ±5 mA. |
| 3 | OUT | power_out | Output to the load, self-limited in short circuit; the inductive switch-off output clamp VON(CL) is 59 V min. |
| 4 | ST | output | Open-drain diagnostic feedback for overtemperature and short circuit; VST(low) is 0.4 V max at Tj = -40°C to +25°C and IST = 1.6 mA. |
| 5 | Vbb | power_in | Positive power supply voltage; operating voltage 6 to 52 V, absolute maximum supply voltage 52 V. |
| 6 | Vbb | power_in | Positive power supply voltage; operating voltage 6 to 52 V, absolute maximum supply voltage 52 V. |
| 7 | Vbb | power_in | Positive power supply voltage; operating voltage 6 to 52 V, absolute maximum supply voltage 52 V. |
| 8 | Vbb | power_in | Positive power supply voltage; operating voltage 6 to 52 V, absolute maximum supply voltage 52 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | Vbb | | | 52 | V | | 6 |
| Supply voltage for full short circuit protection | Vbb(SC) | | | 50 | V | | 6 |
| Continuous input voltage | VIN | -10 | | 16 | V | | 6 |
| Current through input pin (DC) | IIN | -5 | | 5 | mA | | 6 |
| Junction temperature | Tj | | | 150 | °C | | 6 |
| Operating temperature | Ta | -30 | | 85 | °C | | 6 |
| Storage temperature | Tstg | -40 | | 105 | °C | | 6 |
| Power dissipation | Ptot | | | 1.5 | W | Device on 50 mm × 50 mm × 1.5 mm FR4 PCB, 6 cm² Cu (note 1) | 6 |
| Inductive load switch-off energy dissipation (single pulse) | EAS | | | 125 | mJ | Tj = 150°C, IL = 1 A (note 1, 2) | 6 |
| Load dump protection | VLoaddump | | | 73.5 | V | RL = 13.5 Ω, td = 400 ms, VIN = low or high, VA = 13.5 V (notes 2, 3) | 6 |
| Load dump protection | VLoaddump | | | 83.5 | V | RL = 27 Ω, td = 400 ms, VIN = low or high, VA = 13.5 V (notes 2, 3) | 6 |
| Electrostatic discharge voltage (HBM) OUT pin | VESD | -6 | | 6 | kV | ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF), OUT | 6 |
| Electrostatic discharge voltage (HBM) IN pin | VESD | -1 | | 1 | kV | ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF), IN | 6 |
| Electrostatic discharge voltage (HBM) all other pins | VESD | -4 | | 4 | kV | ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF), all other pins | 6 |
| Thermal resistance, minimum footprint | Rth(JA) | | 95 | | K/W | Minimum footprint | 7 |
| Thermal resistance, 6 cm² cooling area | Rth(JA) | | 70 | 83 | K/W | 6 cm² cooling area (note 4) | 7 |
| On-state resistance | RON | | 150 | 200 | mΩ | Tj = 25°C, IL = 1 A, Vbb = 9 V to 52 V | 12 |
| On-state resistance | RON | | 270 | 380 | mΩ | Tj = 150°C | 12 |
| Nominal load current | IL(nom) | 1.3 | 1.7 | | A | Device on PCB (note 9), TC = 85°C, Tj ≤ 150°C | 12 |
| Turn-on time to 90% VOUT | ton | | 80 | 180 | µs | RL = 47 Ω | 12 |
| Turn-off time to 10% VOUT | toff | | 80 | 200 | µs | RL = 47 Ω | 12 |
| Slew rate on 10% to 30% VOUT | dV/dton | | 0.7 | 2 | V/µs | RL = 47 Ω, Vbb = 13.5 V | 12 |
| Slew rate off 70% to 40% VOUT | -dV/dtoff | | 0.9 | 2 | V/µs | RL = 47 Ω, Vbb = 13.5 V | 12 |
| Operating voltage | Vbb(on) | 6 | | 52 | V | | 12 |
| Undervoltage shutoff charge pump | Vbb(under) | | | 4 | V | Tj = -40°C to +85°C | 12 |
| Undervoltage shutoff charge pump | Vbb(under) | | | 5.5 | V | Tj = 150°C | 12 |
| Undervoltage restart of charge pump | Vbb(u cp) | | 4 | 5.5 | V | | 12 |
| Standby current | Ibb(off) | | | 15 | µA | Tj = -40°C to +85°C, VIN = low | 12 |
| Standby current | Ibb(off) | | | 18 | µA | Tj = 150°C, VIN = low (note 10) | 12 |
| Leakage output current (included in Ibb(off)) | IL(off) | | | 5 | µA | VIN = low | 12 |
| Operating current | IGND | | 0.8 | 2 | mA | VIN = high | 12 |
| Initial peak short circuit current limit | IL(SCp) | | | 9 | A | Tj = -40°C, Vbb = 20 V, tm = 150 µs (pin 5 to 3) | 12 |
| Initial peak short circuit current limit | IL(SCp) | | 6.5 | | A | Tj = 25°C (pin 5 to 3) | 12 |
| Repetitive short circuit current limit | IL(SCr) | 4 | | | A | Tj = 150°C, see Timing diagrams | 13 |
| Repetitive short circuit current limit | IL(SCr) | | 6 | | A | Vbb < 40 V, Tj = Tjt, see Timing diagrams | 13 |
| Repetitive short circuit current limit | IL(SCr) | | 4.5 | | A | Vbb > 40 V, Tj = Tjt, see Timing diagrams | 13 |
| Output clamp (inductive load switch off) | VON(CL) | 59 | 63 | | V | VOUT = Vbb - VON(CL), Ibb = 4 mA | 13 |
| Overvoltage protection | Vbb(AZ) | 62 | | | V | Ibb = 4 mA (note 13) | 13 |
| Thermal overload trip temperature | Tjt | 150 | | | °C | | 13 |
| Thermal hysteresis | ΔTjt | | 10 | | K | | 13 |
| Reverse battery | -Vbb | | | 52 | V | Requires 150 Ω resistor in GND connection (note 14) | 13 |
| Drain-source diode voltage (VOUT > Vbb) | -VON | | 600 | | mV | Tj = 150°C | 13 |
| Input turn-on threshold voltage | VIN(T+) | | | 2.2 | V | | 13 |
| Input turn-off threshold voltage | VIN(T-) | 0.8 | | | V | | 13 |
| Input threshold hysteresis | ΔVIN(T) | | 0.4 | | V | | 13 |
| Off state input current | IIN(off) | 1 | | 25 | µA | VIN = 0.7 V | 13 |
| On state input current | IIN(on) | 3 | | 25 | µA | VIN = 5 V | 13 |
| Status output (open drain), Zener limit voltage | VST(high) | 5.4 | 6.1 | | V | IST = 1.6 mA | 13 |
| Status output (open drain), ST low voltage | VST(low) | | | 0.4 | V | Tj = -40°C to +25°C, IST = 1.6 mA | 13 |
| Status output (open drain), ST low voltage | VST(low) | | | 0.6 | V | Tj = 150°C, IST = 1.6 mA | 13 |
| Status invalid after positive input slope | td(ST+) | | 120 | 160 | µs | note 15 | 13 |
| Status invalid after negative input slope | td(ST-) | | 250 | 400 | µs | Vbb = 20 V (note 15) | 14 |
| Input resistance | RI | 2 | 3.5 | 5 | kΩ | | 14 |
| Short circuit detection voltage | VOUT(SC) | | 2.8 | | V | | 14 |
| Open load detection voltage | VOUT(OL) | | 3 | 4 | V | note 16 | 14 |
| Internal output pull down | RO | | 200 | | kΩ | VOUT(OL) = 4 V (note 17) | 14 |
## CAD (KiCad official)
- Symbol: `ISP752RFUMA1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `isp752rfuma1-etched.step` / `isp752rfuma1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `isp752rfuma1.step` / `isp752rfuma1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588912515165773824) (24 pp, sha256 `120fb7f0778fbf6f`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/isp752rfuma1-datasheet.pdf)