# ISOW7843DWER

**Texas Instruments** · Digital Isolators (With Power) · SOIC-16-300mil

ISOW7843DWER from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Input-side (primary) supply voltage, referenced to GND1, with a recommended operating range of 3 V to 5.5 V. |
| 2 | GND1 | power_in | Ground connection for VCC on the input side. |
| 3 | INA | input | Input channel A; the input high threshold is 0.7 × VSI minimum and the input low threshold is 0.3 × VSI maximum, and the output takes its default state (high for non-F devices) when the input is open. |
| 4 | OUTB | output | Output channel B; recommended output current is limited to 4 mA low-level or 4 mA high-level at VSO = 5 V (2 mA at VSO = 3.3 V). |
| 5 | OUTC | output | Output channel C; recommended output current is limited to 4 mA low-level or 4 mA high-level at VSO = 5 V (2 mA at VSO = 3.3 V). |
| 6 | OUTD | output | Output channel D; recommended output current is limited to 4 mA low-level or 4 mA high-level at VSO = 5 V (2 mA at VSO = 3.3 V). |
| 7 | NC | unconnected | No internal connection; the datasheet lists this pin as not connected. |
| 8 | GND1 | power_in | Ground connection for VCC on the input side. |
| 9 | GND2 | power_in | Ground connection for VISO on the isolated output side. |
| 10 | SEL | input | Supply select pin: tie to VISO for VISO = 5 V; tie to GND2 or leave floating for VISO = 3.3 V, with an internal weak pull-down to GND2. |
| 11 | IND | input | Input channel D; the input high threshold is 0.7 × VSI minimum and the input low threshold is 0.3 × VSI maximum, and the output takes its default state (high for non-F devices) when the input is open. |
| 12 | INC | input | Input channel C; the input high threshold is 0.7 × VSI minimum and the input low threshold is 0.3 × VSI maximum, and the output takes its default state (high for non-F devices) when the input is open. |
| 13 | INB | input | Input channel B; the input high threshold is 0.7 × VSI minimum and the input low threshold is 0.3 × VSI maximum, and the output takes its default state (high for non-F devices) when the input is open. |
| 14 | OUTA | output | Output channel A; recommended output current is limited to 4 mA low-level or 4 mA high-level at VSO = 5 V (2 mA at VSO = 3.3 V). |
| 15 | GND2 | power_in | Ground connection for VISO on the isolated output side. |
| 16 | VISO | power_out | Isolated supply output referenced to GND2, set by SEL to 5 V (SEL tied to VISO) or 3.3 V (SEL tied to GND2 or floating). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16-300mil |
| Category | Signal Isolation Devices |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `ISOW7843DWER`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files: `isow7843dwer-etched.step` / `isow7843dwer-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `isow7843dwer.step` / `isow7843dwer.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/isow7841) (58 pp, sha256 `d52d56a624a0bade`, retrieved 2026-10-10, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/isow7843dwer-datasheet.pdf)