component
ISO7821LLDWW
Public Made by Adomby adom
Texas Instruments Isolated LVDS Buffers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownISO7821LLDWW
Texas Instruments · Isolated LVDS Buffers · SOIC-16
ISO7821LLDWW from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | Power supply for side 1 (VCC1) of the isolation barrier. |
| 2 | GND1 | power_in | Ground connection for VCC1 (side 1). |
| 3 | INA+ | input | Positive differential input, channel A. |
| 4 | INA- | input | Negative differential input, channel A. |
| 5 | OUTB- | output | Negative differential output, channel B. |
| 6 | OUTB+ | output | Positive differential output, channel B. |
| 7 | EN1 | input | Output enable 1: side-1 output pins are enabled when EN1 is high or open and are high impedance when EN1 is low. |
| 8 | GND1 | power_in | Ground connection for VCC1 (side 1). |
| 9 | GND2 | power_in | Ground connection for VCC2 (side 2). |
| 10 | EN2 | input | Output enable 2: side-2 output pins are enabled when EN2 is high or open and are high impedance when EN2 is low. |
| 11 | INB+ | input | Positive differential input, channel B. |
| 12 | INB- | input | Negative differential input, channel B. |
| 13 | OUTA- | output | Negative differential output, channel A. |
| 14 | OUTA+ | output | Positive differential output, channel A. |
| 15 | GND2 | power_in | Ground connection for VCC2 (side 2). |
| 16 | VCC2 | power_in | Power supply for side 2 (VCC2) of the isolation barrier. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Signal Isolation Devices |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
ISO7821LLDWW - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
iso7821lldww-etched.step/iso7821lldww-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);iso7821lldww.step/iso7821lldww.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
2d74a1d0aa8124a6, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).