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ISO7742FQDWRQ1
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Texas Instruments Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ISO7742FQDWRQ1
Texas Instruments · Digital Isolators · SOIC-16
ISO7742FQDWRQ1 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | Side-1 supply pin; the recommended VCC1 supply range is 2.25 V to 5.5 V, with a 0.1 µF decoupling capacitor to GND1 placed within 2 mm of the pin. |
| 2 | GND1 | power_in | Ground connection for VCC1 (side 1); one of two side-1 ground pins, both of which must be connected. |
| 3 | INA | input | Logic input for channel A on side 1, which is transmitted across the isolation barrier to OUTA. |
| 4 | INB | input | Logic input for channel B on side 1, which is transmitted across the isolation barrier to OUTB. |
| 5 | OUTC | output | Logic output for channel C on side 2, driven from INC through the isolation barrier; in the high-impedance state when the enable is low. |
| 6 | OUTD | output | Logic output for channel D on side 2, driven from IND through the isolation barrier; in the high-impedance state when the enable is low. |
| 7 | EN1 | input | Output enable for side 1: high or open enables the side-1 outputs, and low places them in the high-impedance state. |
| 8 | GND1 | power_in | Ground connection for VCC1 (side 1); the second side-1 ground pin. |
| 9 | GND2 | power_in | Ground connection for VCC2 (side 2); one of two side-2 ground pins, both of which must be connected. |
| 10 | EN2 | input | Output enable for side 2: high or open enables the side-2 outputs, and low places them in the high-impedance state. |
| 11 | IND | input | Logic input for channel D on side 2, which is transmitted across the isolation barrier to OUTD. |
| 12 | INC | input | Logic input for channel C on side 2, which is transmitted across the isolation barrier to OUTC. |
| 13 | OUTB | output | Logic output for channel B on side 2, driven from INB through the isolation barrier; in the high-impedance state when the enable is low. |
| 14 | OUTA | output | Logic output for channel A on side 2, driven from INA through the isolation barrier; in the high-impedance state when the enable is low. |
| 15 | GND2 | power_in | Ground connection for VCC2 (side 2); the second side-2 ground pin. |
| 16 | VCC2 | power_in | Side-2 supply pin; the recommended VCC2 supply range is 2.25 V to 5.5 V, with a 0.1 µF decoupling capacitor to GND2 placed within 2 mm of the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Signal Isolation Devices |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
ISO7742FQDWRQ1 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
iso7742fqdwrq1-etched.step/iso7742fqdwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);iso7742fqdwrq1.step/iso7742fqdwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (55 pp, sha256
3fc23e4a8eb8bc39, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ISO7742FQDWRQ1
**Texas Instruments** · Digital Isolators · SOIC-16
ISO7742FQDWRQ1 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | Side-1 supply pin; the recommended VCC1 supply range is 2.25 V to 5.5 V, with a 0.1 µF decoupling capacitor to GND1 placed within 2 mm of the pin. |
| 2 | GND1 | power_in | Ground connection for VCC1 (side 1); one of two side-1 ground pins, both of which must be connected. |
| 3 | INA | input | Logic input for channel A on side 1, which is transmitted across the isolation barrier to OUTA. |
| 4 | INB | input | Logic input for channel B on side 1, which is transmitted across the isolation barrier to OUTB. |
| 5 | OUTC | output | Logic output for channel C on side 2, driven from INC through the isolation barrier; in the high-impedance state when the enable is low. |
| 6 | OUTD | output | Logic output for channel D on side 2, driven from IND through the isolation barrier; in the high-impedance state when the enable is low. |
| 7 | EN1 | input | Output enable for side 1: high or open enables the side-1 outputs, and low places them in the high-impedance state. |
| 8 | GND1 | power_in | Ground connection for VCC1 (side 1); the second side-1 ground pin. |
| 9 | GND2 | power_in | Ground connection for VCC2 (side 2); one of two side-2 ground pins, both of which must be connected. |
| 10 | EN2 | input | Output enable for side 2: high or open enables the side-2 outputs, and low places them in the high-impedance state. |
| 11 | IND | input | Logic input for channel D on side 2, which is transmitted across the isolation barrier to OUTD. |
| 12 | INC | input | Logic input for channel C on side 2, which is transmitted across the isolation barrier to OUTC. |
| 13 | OUTB | output | Logic output for channel B on side 2, driven from INB through the isolation barrier; in the high-impedance state when the enable is low. |
| 14 | OUTA | output | Logic output for channel A on side 2, driven from INA through the isolation barrier; in the high-impedance state when the enable is low. |
| 15 | GND2 | power_in | Ground connection for VCC2 (side 2); the second side-2 ground pin. |
| 16 | VCC2 | power_in | Side-2 supply pin; the recommended VCC2 supply range is 2.25 V to 5.5 V, with a 0.1 µF decoupling capacitor to GND2 placed within 2 mm of the pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Signal Isolation Devices |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `ISO7742FQDWRQ1`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `iso7742fqdwrq1-etched.step` / `iso7742fqdwrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `iso7742fqdwrq1.step` / `iso7742fqdwrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/iso7740-q1) (55 pp, sha256 `3fc23e4a8eb8bc39`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/iso7742fqdwrq1-datasheet.pdf)