Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

ISO7742DWR

Texas Instruments · Digital Isolators · SOIC-16-300mil

ISO7742DWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Power supply for input-side isolation section; voltage range 2.25V to 5.5V recommended.
2 GND1 power_in Ground connection for VCC1 input-side power supply.
3 INA input Isolated input for channel A; accepts CMOS/LVCMOS logic with input threshold at 0.3×VCCI (low) to 0.7×VCCI (high).
4 INB input Isolated input for channel B; accepts CMOS/LVCMOS logic with input threshold at 0.3×VCCI (low) to 0.7×VCCI (high).
5 OUTC output Isolated output for channel C with propagation delay 6-17 ns at 5V, output high at VCCO - 0.4V minimum, output low at 0.4V maximum.
6 OUTD output Isolated output for channel D with propagation delay 6-17 ns at 5V, output high at VCCO - 0.4V minimum, output low at 0.4V maximum.
7 EN1 input Output enable control for side 1; high or open state enables side 1 outputs, low state places outputs in high-impedance state.
8 GND1 power_in Ground connection for VCC1 input-side power supply.
9 GND2 power_in Ground connection for VCC2 output-side power supply.
10 EN2 input Output enable control for side 2; high or open state enables side 2 outputs, low state places outputs in high-impedance state.
11 IND input Isolated input for channel D; accepts CMOS/LVCMOS logic with input threshold at 0.3×VCCI (low) to 0.7×VCCI (high).
12 INC input Isolated input for channel C; accepts CMOS/LVCMOS logic with input threshold at 0.3×VCCI (low) to 0.7×VCCI (high).
13 OUTB output Isolated output for channel B with propagation delay 6-17 ns at 5V, output high at VCCO - 0.4V minimum, output low at 0.4V maximum.
14 OUTA output Isolated output for channel A with propagation delay 6-17 ns at 5V, output high at VCCO - 0.4V minimum, output low at 0.4V maximum.
15 GND2 power_in Ground connection for VCC2 output-side power supply.
16 VCC2 power_in Power supply for output-side isolation section; voltage range 2.25V to 5.5V recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

CAD (KiCad official)

  • Symbol: ISO7742DWR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: iso7742dwr-etched.step / iso7742dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso7742dwr.step / iso7742dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 d6ac6b90609c88c4, retrieved 2026-09-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF