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Contents

README

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ISO7731FDWR

Texas Instruments · Digital Isolators · SOIC-16-300mil

ISO7731FDWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Power supply input, 2.25V to 5.5V operating range, bypass with 0.1μF capacitor to GND1
2 GND1 power_in Input-side ground reference for VCC1 bypass capacitor and input circuitry
3 INA input Channel A input, CMOS logic with VIH ≥ 0.7×VCCI and VIL ≤ 0.3×VCCI, non-inverted data path to OUTA with 11ns typical propagation delay at 5V
4 INB input Channel B input, CMOS logic with VIH ≥ 0.7×VCCI and VIL ≤ 0.3×VCCI, non-inverted data path to OUTB with 11ns typical propagation delay at 5V
5 OUTC tri_state Channel C tri-state output (inverted logic), VOH ≥ VCCO - 0.4V and VOL ≤ 0.4V at 5V, high-impedance when EN1 low, defaults low when powered off (F-suffix variant)
6 NC unconnected Not connected pin
7 EN1 input Output enable 1, high or open-circuit state enables side 1 outputs, low state forces outputs to high-impedance and reduces quiescent current
8 GND1 power_in Input-side ground reference for VCC1 bypass capacitor and input circuitry
9 GND2 power_in Output-side ground reference for VCC2 bypass capacitor and output circuitry, isolated from GND1 by ≥5000VRMS in DW package
10 EN2 input Output enable 2, high or open-circuit state enables side 2 outputs, low state forces outputs to high-impedance and reduces quiescent current
11 NC unconnected Not connected pin
12 INC input Channel C input (inverted logic path), CMOS logic with VIH ≥ 0.7×VCCI and VIL ≤ 0.3×VCCI, inverted output to OUTC with 11ns typical propagation delay at 5V
13 OUTB tri_state Channel B tri-state output (non-inverted logic), VOH ≥ VCCO - 0.4V and VOL ≤ 0.4V at 5V, high-impedance when EN2 low, defaults low when powered off (F-suffix variant)
14 OUTA tri_state Channel A tri-state output (non-inverted logic), VOH ≥ VCCO - 0.4V and VOL ≤ 0.4V at 5V, high-impedance when EN2 low, defaults low when powered off (F-suffix variant)
15 GND2 power_in Output-side ground reference for VCC2 bypass capacitor and output circuitry, isolated from GND1 by ≥5000VRMS in DW package
16 VCC2 power_in Power supply input, 2.25V to 5.5V operating range, bypass with 0.1μF capacitor to GND2, galvanically isolated from VCC1 by ≥5000VRMS

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

CAD (KiCad official)

  • Symbol: ISO7731FDWR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: iso7731fdwr-etched.step / iso7731fdwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso7731fdwr.step / iso7731fdwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 6d47a7b1277198b2, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF