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docs iso7720fdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers iso7720fdr: viewers · Ray 2mo ago
iso7720fdr-etched.fit.json iso7720fdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
iso7720fdr-etched.glb iso7720fdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
iso7720fdr-etched.step iso7720fdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
iso7720fdr.glb Publish 0.1.0 · Ray 2mo ago
iso7720fdr.kicad_mod Publish 0.1.0 · Ray 2mo ago
iso7720fdr.kicad_sym Publish 0.1.0 · Ray 2mo ago
iso7720fdr.lbr Publish 0.1.0 · Ray 2mo ago
iso7720fdr.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
page.json iso7720fdr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 27d ago
README.md iso7720fdr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

ISO7720FDR

Texas Instruments · Digital Isolators · SOIC-8

ISO7720FDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Input-side power supply, 2.25 V to 5.5 V. Bypass with a low-ESR ceramic capacitor to GND1 close to the pin.
2 INA input Digital input for channel A. LVCMOS/CMOS-compatible; VIH = 0.7 x VCC1, VIL = 0.3 x VCC1. Default output HIGH if input floats or supply is lost.
3 INB input Digital input for channel B. LVCMOS/CMOS-compatible; VIH = 0.7 x VCC1, VIL = 0.3 x VCC1. Default output HIGH if input floats or supply is lost.
4 GND1 power_in Ground reference for VCC1 (input side).
5 GND2 power_in Ground reference for VCC2 (output side).
6 OUTB output Digital output for channel B, referenced to VCC2/GND2. IOH = -4 mA (5 V), -2 mA (3.3 V), -1 mA (2.5 V); IOL = 4 mA (5 V), 2 mA (3.3 V), 1 mA (2.5 V).
7 OUTA output Digital output for channel A, referenced to VCC2/GND2. IOH = -4 mA (5 V), -2 mA (3.3 V), -1 mA (2.5 V); IOL = 4 mA (5 V), 2 mA (3.3 V), 1 mA (2.5 V).
8 VCC2 power_in Output-side power supply, 2.25 V to 5.5 V. Bypass with a low-ESR ceramic capacitor to GND2 close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Comm/UART
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • ISO7720FDR
  • ISO7720DWV
  • ISO7720FDWV
  • ISO7720DW
  • ISO7720FDW

CAD (KiCad official)

  • Symbol: ISO7720FDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: iso7720fdr-etched.step / iso7720fdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso7720fdr.step / iso7720fdr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
iso7720fdr.step 122 KB You want the bare part, or you mark your own boards.
iso7720fdr-etched.step 2.0 MB You want the part with ISO7720FDR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 492 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 6cd4876010fb4841, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF