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ISO7321CQDRQ1

Texas Instruments · Digital Isolators · SOIC-8

ISO7321CQDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Power supply for side 1 (input channels of INA/INB side), operating range 3 V to 5.5 V.
2 OUTA output Channel A output on the ISO7321-Q1, rated for IOH of -4 mA and IOL of 4 mA.
3 INB input Channel B input with integrated noise filter and TTL thresholds (VIH min 2 V, VIL max 0.8 V, absolute max VCC+0.5 V not exceeding 6 V).
4 GND1 power_in Ground connection for VCC1.
5 GND2 power_in Ground connection for VCC2.
6 OUTB output Channel B output, rated for IOH of -4 mA and IOL of 4 mA.
7 INA input Channel A input on the ISO7321-Q1 with integrated noise filter and TTL thresholds (VIH min 2 V, VIL max 0.8 V, absolute max VCC+0.5 V not exceeding 6 V).
8 VCC2 power_in Power supply for side 2 (output side for channel B), operating range 3 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 6 V VCC1, VCC2 4
Voltage INx, OUTx -0.5 6 V VCC+0.5, must not exceed 6 V 4
Output current IO -15 15 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -4000 4000 V HBM per AEC Q100-002 4
ESD CDM V(ESD) -1500 1500 V CDM per AEC Q100-011 4
Supply voltage VCC1, VCC2 3 5.5 V 4
High-level output current IOH -4 mA 4
Low-level output current IOL 4 mA 4
High-level input voltage VIH 2 5.5 V 4
Low-level input voltage VIL 0 0.8 V 4
Input pulse duration tui 40 ns 4
Signaling rate 1/tui 0 25 Mbps 4
Junction temperature TJ 136 °C 4
Ambient temperature TA -40 25 125 °C 4
Junction-to-ambient thermal resistance RθJA 121 °C/W D (SOIC) 8 pins 4
Junction-to-case (top) thermal resistance RθJCtop 67.9 °C/W 4
Junction-to-board thermal resistance RθJB 61.6 °C/W 4
High-level output voltage VOH 4.7 V IOH = -4 mA; 5-V supply (min VCCO, 0.5) 5
High-level output voltage VOH 5 V IOH = -20 μA; 5-V supply (min VCCO, 0.1) 5
Low-level output voltage VOL 0.2 0.4 V IOL = 4 mA; 5-V supply 5
Low-level output voltage VOL 0 0.1 V IOL = 20 μA; 5-V supply 5
Input threshold voltage hysteresis VI(HYS) 460 mV 5-V supply 5
High-level input current IIH 10 μA IN = VCC; 5-V supply 5
Low-level input current IIL -10 μA IN = 0 V; 5-V supply 5
Common-mode transient immunity CMTI 25 65 kV/μs VI = VCC or 0 V; 5-V supply 5
Supply current ICC1, ICC2 ICC 1.7 2.8 mA ISO7321, DC to 1 Mbps, VI = VCC or 0 V; 5-V supply 5
Supply current ICC1, ICC2 ICC 2.5 3.7 mA ISO7321, 10 Mbps, CL = 15 pF; 5-V supply 5
Supply current ICC1, ICC2 ICC 3.7 5.4 mA ISO7321, 25 Mbps, CL = 15 pF; 5-V supply 5
High-level output voltage VOH 3 V IOH = -4 mA; 3.3-V supply (min VCCO, 0.5) 6
High-level output voltage VOH 3.3 V IOH = -20 μA; 3.3-V supply (min VCCO, 0.1) 6
Low-level output voltage VOL 0.2 0.4 V IOL = 4 mA; 3.3-V supply 6
Low-level output voltage VOL 0 0.1 V IOL = 20 μA; 3.3-V supply 6
Input threshold voltage hysteresis VI(HYS) 450 mV 3.3-V supply 6
High-level input current IIH 10 μA IN = VCC; 3.3-V supply 6
Low-level input current IIL -10 μA IN = 0 V; 3.3-V supply 6
Common-mode transient immunity CMTI 25 50 kV/μs VI = VCC or 0 V; 3.3-V supply 6
Supply current ICC1, ICC2 ICC 1.2 2 mA ISO7321, DC to 1 Mbps, VI = VCC or 0 V; 3.3-V supply 6
Supply current ICC1, ICC2 ICC 1.7 2.5 mA ISO7321, 10 Mbps, CL = 15 pF; 3.3-V supply 6
Supply current ICC1, ICC2 ICC 2.5 3.6 mA ISO7321, 25 Mbps, CL = 15 pF; 3.3-V supply 6
Maximum power dissipation by ISO7321-Q1 PD 67 mW VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, 12.5 MHz square wave 6
Maximum power dissipation by side-1 of ISO7321-Q1 PD1 33.5 mW VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, 12.5 MHz square wave 6
Maximum power dissipation by side-2 of ISO7321-Q1 PD2 33.5 mW VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, 12.5 MHz square wave 6
Propagation delay time tPLH, tPHL 20 33 57 ns See Figure 11; 5-V supply 7
Pulse width distortion /tPHL, tPLH/ PWD 4 ns See Figure 11; 5-V supply 7
Channel-to-channel output skew time ISO7321-Q1 tsk(o) 17 ns 5-V supply 7
Part-to-part skew time tsk(pp) 23 ns 5-V supply 7
Output signal rise time tr 2.4 ns See Figure 11; 5-V supply 7
Output signal fall time tf 2.1 ns See Figure 11; 5-V supply 7
Fail-safe output delay time from input power loss tfs 7.5 μs See Figure 12; 5-V supply 7
Propagation delay time tPLH, tPHL 22 37 66 ns See Figure 11; 3.3-V supply 7
Pulse width distortion /tPHL, tPLH/ PWD 3 ns See Figure 11; 3.3-V supply 7
Channel-to-channel output skew time ISO7321-Q1 tsk(o) 16 ns 3.3-V supply 7
Part-to-part skew time tsk(pp) 28 ns 3.3-V supply 7
Output signal rise time tr 3.1 ns See Figure 11; 3.3-V supply 7
Output signal fall time tf 2.6 ns See Figure 11; 3.3-V supply 7
Fail-safe output delay time from input power loss tfs 7.4 μs See Figure 12; 3.3-V supply 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pet Voltage, 6000 V 300 VRMS Basic Insulation PK maximum working voltage Maximum Repetitive Peak working voltage per CSA 13

CAD (KiCad official)

  • Symbol: ISO7321CQDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: iso7321cqdrq1-etched.step / iso7321cqdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso7321cqdrq1.step / iso7321cqdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 53efe81edcfbba5b, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF