# ISO6742DWR

**Texas Instruments** · Digital Isolators · SOIC-16-300mil

ISO6742DWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | Side 1 supply; the datasheet allows 1.71 V to 1.89 V or 2.25 V to 5.5 V, with a 0.1 µF decoupling capacitor placed within 2 mm of the pin. |
| 2 | GND1 | power_in | Ground connection for the side 1 supply VCC1. |
| 3 | INA | input | Channel A input on side 1; logic-high input is 0.7 × VCCI minimum and logic-low input is 0.3 × VCCI maximum. |
| 4 | INB | input | Channel B input on side 1; logic-high input is 0.7 × VCCI minimum and logic-low input is 0.3 × VCCI maximum. |
| 5 | OUTC | output | Channel C reverse-direction output on side 1, driven from INC on side 2 and enabled by EN1. |
| 6 | OUTD | output | Channel D reverse-direction output on side 1, driven from IND on side 2 and enabled by EN1. |
| 7 | EN1 | input | Output enable for side 1; high or open enables the side 1 outputs (OUTC, OUTD), and low forces them to high impedance. |
| 8 | GND1 | power_in | Ground connection for the side 1 supply VCC1 (second side 1 ground pin). |
| 9 | GND2 | power_in | Ground connection for the side 2 supply VCC2 (first side 2 ground pin). |
| 10 | EN2 | input | Output enable for side 2; high or open enables the side 2 outputs (OUTA, OUTB), and low forces them to high impedance. |
| 11 | IND | input | Channel D reverse-direction input on side 2; logic-high input is 0.7 × VCCI minimum and logic-low input is 0.3 × VCCI maximum. |
| 12 | INC | input | Channel C reverse-direction input on side 2; logic-high input is 0.7 × VCCI minimum and logic-low input is 0.3 × VCCI maximum. |
| 13 | OUTB | output | Channel B forward-direction output on side 2, driven from INB and enabled by EN2. |
| 14 | OUTA | output | Channel A forward-direction output on side 2, driven from INA and enabled by EN2. |
| 15 | GND2 | power_in | Ground connection for the side 2 supply VCC2 (second side 2 ground pin). |
| 16 | VCC2 | power_in | Side 2 supply; the datasheet allows 1.71 V to 1.89 V or 2.25 V to 5.5 V, with a 0.1 µF decoupling capacitor placed within 2 mm of the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16-300mil |
| Category | Signal Isolation Devices |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `ISO6742DWR`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files: `iso6742dwr-etched.step` / `iso6742dwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `iso6742dwr.step` / `iso6742dwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/iso6742) (50 pp, sha256 `e3145a4f777d3776`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/iso6742dwr-datasheet.pdf)