component
ISO6721BDR
Public Made by Adomby adom
Texas Instruments Digital Isolators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
iso6721bdr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
9aa38c0
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{
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"type": "component",
"slug": "iso6721bdr",
"title": "ISO6721BDR",
"brief": "Texas Instruments Digital Isolators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
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"component": {
"mpn": "ISO6721BDR",
"manufacturer": "Texas Instruments",
"package": "SOIC-8",
"pin_count": 8,
"category": "Comm/UART",
"subcategory": "Digital Isolators",
"datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2302281530_Texas-Instruments-ISO6721BDR_C5216430.pdf",
"parts": {
"symbol": "iso6721bdr.kicad_sym",
"footprint": "iso6721bdr.kicad_mod",
"model_3d": "iso6721bdr-etched.glb",
"model_3d_plain": "iso6721bdr.glb",
"model_3d_step": "iso6721bdr-etched.step",
"model_3d_step_plain": "iso6721bdr.step",
"lbr": "iso6721bdr.lbr"
},
"distributor_links": {
"digikey": "296-ISO6721BDRTR-ND",
"lcsc": "C5216430"
},
"pins": [
{
"number": "1",
"name": "VCC1",
"type": "power_in",
"description": "Side-1 (input side of channel A / output side of channel B) power supply. Operating range 1.71-1.89 V or 2.25-5.5 V referenced to GND1. Bypass locally with a low-ESR ceramic capacitor to GND1."
},
{
"number": "2",
"name": "OUTA",
"type": "output",
"description": "Side-1 isolated digital output of channel A (forward channel driven by INA on side 2). Push-pull CMOS output; IOH up to 4 mA (VCCO=5 V), IOL up to 4 mA. Defaults HIGH when input power/signal is lost."
},
{
"number": "3",
"name": "INB",
"type": "input",
"description": "Side-1 digital input of channel B (forward direction on side 1). CMOS/LVCMOS compatible logic input; VIH ≥ 0.7×VCC1, VIL ≤ 0.3×VCC1. Drives OUTB across the isolation barrier."
},
{
"number": "4",
"name": "GND1",
"type": "power_in",
"description": "Side-1 ground return for VCC1. Isolated from GND2 by the SiO2 capacitive barrier (3000 VRMS, UL 1577)."
},
{
"number": "5",
"name": "GND2",
"type": "power_in",
"description": "Side-2 ground return for VCC2. Isolated from GND1 by the SiO2 capacitive barrier (3000 VRMS, UL 1577)."
},
{
"number": "6",
"name": "OUTB",
"type": "output",
"description": "Side-2 isolated digital output of channel B (driven by INB on side 1). Push-pull CMOS output; IOH up to 4 mA (VCCO=5 V), IOL up to 4 mA. Defaults HIGH when input power/signal is lost."
},
{
"number": "7",
"name": "INA",
"type": "input",
"description": "Side-2 digital input of channel A (reverse direction relative to channel B). CMOS/LVCMOS compatible logic input; VIH ≥ 0.7×VCC2, VIL ≤ 0.3×VCC2. Drives OUTA across the isolation barrier."
},
{
"number": "8",
"name": "VCC2",
"type": "power_in",
"description": "Side-2 (input side of channel A / output side of channel B) power supply. Operating range 1.71-1.89 V or 2.25-5.5 V referenced to GND2. VCC1 and VCC2 can be set independently. Bypass locally with a low-ESR ceramic capacitor to GND2."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2302281530_Texas-Instruments-ISO6721BDR_C5216430.pdf",
"pages": 50,
"sha256": "7c2da9379961a24d",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "iso6721bdr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "iso6721bdr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "b63b73a55f5e230983746230f5d920ac0670aefb1d1eef43ed8860a77cf7d5af",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "SOIC-8",
"Category": "Comm/UART",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"iso6721bdr"
],
"discovery_pitch": "ISO6721BDR (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"iso6721bdr.kicad_sym",
"iso6721bdr.kicad_mod",
"iso6721bdr.glb",
"iso6721bdr.step",
"iso6721bdr-etched.step",
"iso6721bdr.lbr",
"docs/hero.png",
"docs/iso6721bdr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "ISO6721BDR",
"kind": "packaging"
},
{
"mpn": "ISO6721BDRD",
"kind": "packaging"
}
],
"updated_at": "2026-09-24T23:04:08.407Z"
}