component
ISO6720BQDRQ1
Public Made by Adomby adom
Texas Instruments Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 19h ago |
| viewers | 19h ago |
| iso6720bqdrq1-etched.glb | 19h ago |
| iso6720bqdrq1-etched.step | 19h ago |
| iso6720bqdrq1-hero.glb | 19h ago |
| iso6720bqdrq1-hero.overlay.json | 19h ago |
| iso6720bqdrq1.glb | 19h ago |
| iso6720bqdrq1.kicad_mod | 19h ago |
| iso6720bqdrq1.kicad_sym | 19h ago |
| iso6720bqdrq1.lbr | 19h ago |
| iso6720bqdrq1.step | 19h ago |
| package.json | 19h ago |
| page.json | 19h ago |
| README.md | 19h ago |
| verification.json | 19h ago |
ISO6720BQDRQ1
Texas Instruments · Digital Isolators · SOIC-8
ISO6720BQDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | Power supply for side 1; the datasheet allows 1.71V to 1.89V and 2.25V to 5.5V operation, with an absolute maximum of 6V relative to GND1. |
| 2 | INA | input | Input, channel A, referenced to GND1; the voltage must not exceed VCC1 + 0.5V or 6V absolute maximum. |
| 3 | INB | input | Input, channel B, referenced to GND1; the voltage must not exceed VCC1 + 0.5V or 6V absolute maximum. |
| 4 | GND1 | power_in | Ground connection for VCC1. |
| 5 | GND2 | power_in | Ground connection for VCC2. |
| 6 | OUTB | output | Output, channel B, referenced to GND2; output current is limited to ±15mA absolute maximum. |
| 7 | OUTA | output | Output, channel A, referenced to GND2; output current is limited to ±15mA absolute maximum. |
| 8 | VCC2 | power_in | Power supply for side 2; the datasheet allows 1.71V to 1.89V and 2.25V to 5.5V operation, with an absolute maximum of 6V relative to GND2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Signal Isolation Devices |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VCC1 to GND1 | VCC1 | -0.5 | 6 | V | 6 | ||
| Supply voltage VCC2 to GND2 | VCC2 | -0.5 | 6 | V | 6 | ||
| Output current | Io | -15 | 15 | mA | 6 | ||
| Operating junction temperature | TJ | 150 | °C | 6 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| ESD HBM | V(ESD) | -6000 | 6000 | V | HBM, ANSI/ESDA/JEDEC JS-001, all pins | 6 | |
| ESD CDM | V(ESD) | -1500 | 1500 | V | CDM, JESD22-C101, all pins | 6 | |
| Supply voltage side 1 | VCC1 | 1.71 | 1.89 | V | VCC = 1.8 V | 7 | |
| Supply voltage side 1 | VCC1 | 2.25 | 5.5 | V | VCC = 2.5 V to 5 V | 7 | |
| Supply voltage side 2 | VCC2 | 1.71 | 1.89 | V | VCC = 1.8 V | 7 | |
| Supply voltage side 2 | VCC2 | 2.25 | 5.5 | V | VCC = 2.5 V to 5 V | 7 | |
| Data rate | DR | 0 | 50 | Mbps | 7 | ||
| Ambient temperature | TA | -40 | 25 | 125 | °C | 7 | |
| Junction-to-ambient thermal resistance | RθJA | 104.6 | °C/W | D (SOIC) 8 pins, ISO672xB | 8 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 48.9 | °C/W | D (SOIC) 8 pins, ISO672xB | 8 | ||
| Junction-to-board thermal resistance | RθJB | 52.9 | °C/W | D (SOIC) 8 pins, ISO672xB | 8 | ||
| Junction-to-top characterization parameter | ψJT | 7.9 | °C/W | D (SOIC) 8 pins, ISO672xB | 8 | ||
| Junction-to-board characterization parameter | ψJB | 52.1 | °C/W | D (SOIC) 8 pins, ISO672xB | 8 | ||
| Maximum power dissipation (both sides) | PD | 72 | mW | ISO6720; VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, 25-MHz 50% duty cycle square wave | 8 | ||
| Maximum power dissipation (side-1) | PD1 | 20 | mW | ISO6720 | 8 | ||
| Maximum power dissipation (side-2) | PD2 | 52 | mW | ISO6720 | 8 | ||
| Low-level output voltage | VOL | 0.4 | V | VCC1 = VCC2 = 5 V ± 10%; IOL = 4 mA | 14 | ||
| Low-level output voltage | VOL | 0.2 | V | VCC1 = VCC2 = 3.3 V ± 10%; IOL = 2mA | 16 | ||
| Low-level output voltage | VOL | 0.1 | V | VCC1 = VCC2 = 2.5 V ± 10%; IOL = 1mA | 18 | ||
| Low-level output voltage | VOL | 0.1 | V | VCC1 = VCC2 = 1.8 V ± 5%; IOL = 1mA | 20 | ||
| High-level input current | IIH | 10 | µA | VIH = VCCI at INx; 5 V supply | 14 | ||
| Low-level input current | IIL | -10 | µA | VIL = 0 V at INx; 5 V supply | 14 | ||
| Common mode transient immunity | CMTI | 100 | 150 | kV/us | VI = VCC or 0 V, VCM = 1200 V; 5 V supply | 14 | |
| Input capacitance | Ci | 2.8 | pF | VI = VCC/2 + 0.4×sin(2πft), f = 2 MHz, VCC = 5 V | 14 | ||
| Supply current ICC1, DC | ICC1 | 1.1 | 1.7 | mA | ISO6720, 5 V; VI = VCCI (VI = 0 V for F suffix) | 14 | |
| Supply current ICC2, DC | ICC2 | 1.3 | 2.1 | mA | ISO6720, 5 V; VI = VCCI (VI = 0 V for F suffix) | 14 | |
| Supply current ICC1, DC | ICC1 | 3.2 | 4.6 | mA | ISO6720, 5 V; VI = 0 V (VI = VCC1 for F suffix) | 14 | |
| Supply current ICC2, DC | ICC2 | 1.4 | 2.3 | mA | ISO6720, 5 V; VI = 0 V (VI = VCC1 for F suffix) | 14 | |
| Supply current ICC1, 1 Mbps | ICC1 | 2.1 | 3.1 | mA | ISO6720, 5 V; all channels switching, CL = 15 pF, 1 Mbps | 14 | |
| Supply current ICC2, 1 Mbps | ICC2 | 1.5 | 2.3 | mA | ISO6720, 5 V; all channels switching, CL = 15 pF, 1 Mbps | 14 | |
| Supply current ICC1, 10 Mbps | ICC1 | 2.2 | 3.2 | mA | ISO6720, 5 V; all channels switching, CL = 15 pF, 10 Mbps | 14 | |
| Supply current ICC2, 10 Mbps | ICC2 | 2.7 | 3.6 | mA | ISO6720, 5 V; all channels switching, CL = 15 pF, 10 Mbps | 14 | |
| Supply current ICC1, 50 Mbps | ICC1 | 2.5 | 3.6 | mA | ISO6720, 5 V; all channels switching, CL = 15 pF, 50 Mbps | 14 | |
| Supply current ICC2, 50 Mbps | ICC2 | 7.9 | 9.5 | mA | ISO6720, 5 V; all channels switching, CL = 15 pF, 50 Mbps | 14 | |
| Propagation delay time | tPLH, tPHL | 11 | 18 | ns | 5 V supply; See 图 8-1 | 22 | |
| Propagation delay drift | tP(dft) | 8 | ps/℃ | 5 V supply | 22 | ||
| Pulse width distortion | PWD | 0.2 | 7 | ns | /tPHL, tPLH/; 5 V supply; See 图 8-1 | 22 | |
| Channel-to-channel output skew time | tsk(o) | 6 | ns | Same direction channels; 5 V supply | 22 | ||
| Part-to-part skew time | tsk(p-p) | 6 | ns | 5 V supply | 22 | ||
| Output signal rise time | tr | 2.6 | 4.5 | ns | 5 V supply; See 图 8-1 | 22 | |
| Output signal fall time | tf | 2.6 | 4.5 | ns | 5 V supply; See 图 8-1 | 22 | |
| Time from UVLO to valid output data | tPU | 300 | us | 5 V supply | 22 | ||
| Default output delay time from input power loss | tDO | 0.1 | 0.3 | us | Measured from the time VCC goes below 1.2V. See 图 8-2; 5 V supply | 22 |
CAD (KiCad official)
- Symbol:
ISO6720BQDRQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
iso6720bqdrq1-etched.step/iso6720bqdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);iso6720bqdrq1.step/iso6720bqdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (61 pp, sha256
f2df4ede1d6ff467, retrieved 2026-10-30, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).