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ISO6521FDR

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TEXAS INSTRUMENTS Global Sourcing Parts, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ISO6521FDR

TEXAS INSTRUMENTS · Global Sourcing Parts · SOIC-8

ISO6521FDR from TEXAS INSTRUMENTS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Power supply for side 1, operating range 1.71V to 1.89V or 2.25V to 5.5V with respect to GND1 (absolute maximum 6V).
2 OUTA output Output, channel A (ISO6521 has this channel in the direction from side 2 to side 1), output swing limited to VCC1 + 0.5V with maximum 6V.
3 INB input Input, channel B, with high level at least 0.7 x VCC1 and low level at most 0.3 x VCC1.
4 GND1 power_in Ground connection for VCC1.
5 GND2 power_in Ground connection for VCC2.
6 OUTB output Output, channel B, output swing limited to VCC2 + 0.5V with maximum 6V.
7 INA input Input, channel A, with high level at least 0.7 x VCC2 and low level at most 0.3 x VCC2.
8 VCC2 power_in Power supply for side 2, operating range 1.71V to 1.89V or 2.25V to 5.5V with respect to GND2 (absolute maximum 6V).

Key specifications

Parameter Value
Manufacturer TEXAS INSTRUMENTS
Package SOIC-8
Category Global Sourcing Parts
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC1 to GND1 VCC1 -0.5 6 V 4
Supply voltage VCC2 to GND2 VCC2 -0.5 6 V 4
Input voltage INx to GNDx -0.5 V Max is VCCX + 0.5, must not exceed 6 V 4
Output voltage OUTx to GNDx -0.5 V Max is VCCX + 0.5, must not exceed 6 V 4
Output current Io -15 15 mA 4
Operating junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Transient isolation voltage AC (SOIC-8) 2000 VRMS t=60s 4
Transient isolation voltage DC (SOIC-8) 2828 VDC t=60s 4
ESD HBM V(ESD) -6000 6000 V ANSI/ESDA/JEDEC JS-001, all pins 4
ESD CDM V(ESD) -1500 1500 V JESD22-C101, all pins 4
Supply voltage side 1 VCC1 1.71 1.89 V VCC = 1.8 V 4
Supply voltage side 1 VCC1 2.25 5.5 V VCC = 2.5 V to 5 V 4
Supply voltage side 2 VCC2 1.71 1.89 V VCC = 1.8 V 4
Supply voltage side 2 VCC2 2.25 5.5 V VCC = 2.5 V to 5 V 4
High level output current IOH -4 mA VCCO = 5 V 5
Low level output current IOL 4 mA VCCO = 5 V 5
Data rate DR 0 50 Mbps 5
Ambient temperature TA -40 25 125 °C 5
Functional isolation working voltage AC (SOIC-8) VIOWM 450 VRMS AC voltage (sine wave) 5
Functional isolation working voltage DC (SOIC-8) VIOWM 637 VDC DC voltage 5
Junction-to-ambient thermal resistance RθJA 104.6 °C/W D (SOIC-8) 5
Junction-to-case (top) thermal resistance RθJC(top) 48.9 °C/W D (SOIC-8) 5
Junction-to-board thermal resistance RθJB 52.9 °C/W D (SOIC-8) 5
Junction-to-top characterization parameter ψJT 7.9 °C/W D (SOIC-8) 5
Junction-to-board characterization parameter ψJB 52.1 °C/W D (SOIC-8) 5
Low-level output voltage VOL 0.4 V IOL = 4 mA; VCC1 = VCC2 = 5 V ± 10% 6
High-level input current IIH 10 µA VIH = VCCI at INx; VCC = 5 V ± 10% 6
Low-level input current IIL -10 µA VIL = 0 V at INx; VCC = 5 V ± 10% 6
Common mode transient immunity CMTI 100 150 kV/μs VI = VCC or 0 V, VCM = 700V; VCC = 5 V ± 10% 6
Low-level output voltage VOL 0.2 V IOL = 2mA; VCC1 = VCC2 = 3.3 V ± 10% 7
High-level input current IIH 10 µA VIH = VCCI at INx; VCC = 3.3 V ± 10% 7
Low-level input current IIL -10 µA VIL = 0 V at INx; VCC = 3.3 V ± 10% 7
Common mode transient immunity CMTI 100 150 kV/μs VI = VCC or 0 V, VCM = 700V; VCC = 3.3 V ± 10% 7
Low-level output voltage VOL 0.1 V IOL = 1mA; VCC1 = VCC2 = 2.5 V ± 10% 8
High-level input current IIH 10 µA VIH = VCCI at INx; VCC = 2.5 V ± 10% 8
Low-level input current IIL -10 µA VIL = 0 V at INx; VCC = 2.5 V ± 10% 8
Common mode transient immunity CMTI 100 150 kV/μs VI = VCC or 0 V, VCM = 700V; VCC = 2.5 V ± 10% 8
Low-level output voltage VOL 0.1 V IOL = 1mA; VCC1 = VCC2 = 1.8 V ± 5% 9
High-level input current IIH 10 µA VIH = VCCI at INx; VCC = 1.8 V ± 5% 9
Low-level input current IIL -10 µA VIL = 0 V at INx; VCC = 1.8 V ± 5% 9
Common mode transient immunity CMTI 100 150 kV/μs VI = VCC or 0 V, VCM = 700V; VCC = 1.8 V ± 5% 9
Supply current DC, ISO6521 (VI = VCCI; F suffix VI = 0 V) ICC1, ICC2 1.2 2.2 mA VCC = 5 V ± 10%; VI = VCCI (ISO6521); VI = 0 V (ISO6521 with F suffix) 6
Supply current DC, ISO6521 (VI = 0 V; F suffix VI = VCCI) ICC1, ICC2 2.3 3.5 mA VCC = 5 V ± 10%; VI = 0 V (ISO6521); VI = VCCI (ISO6521 with F suffix) 6
Supply current AC, ISO6521 50 Mbps ICC1, ICC2 5.2 6.7 mA VCC = 5 V ± 10%; all channels switching, CL = 15 pF, 50 Mbps 6
Supply current DC, ISO6521 (VI = VCCI; F suffix VI = 0 V) ICC1, ICC2 1.2 2.2 mA VCC = 3.3 V ± 10%; VI = VCCI (ISO6521); VI = 0 V (ISO6521 with F suffix) 7
Supply current DC, ISO6521 (VI = 0 V; F suffix VI = VCCI) ICC1, ICC2 2.3 3.5 mA VCC = 3.3 V ± 10%; VI = 0 V (ISO6521); VI = VCCI (ISO6521 with F suffix) 7
Supply current AC, ISO6521 50 Mbps ICC1, ICC2 4.2 5.5 mA VCC = 3.3 V ± 10%; all channels switching, CL = 15 pF, 50 Mbps 7
Supply current DC, ISO6521 (VI = VCCI; F suffix VI = 0 V) ICC1, ICC2 1.2 2.2 mA VCC = 2.5 V ± 10%; VI = VCCI (ISO6521); VI = 0 V (ISO6521 with F suffix) 8
Supply current DC, ISO6521 (VI = 0 V; F suffix VI = VCCI) ICC1, ICC2 2.3 3.5 mA VCC = 2.5 V ± 10%; VI = 0 V (ISO6521); VI = VCCI (ISO6521 with F suffix) 8
Supply current AC, ISO6521 50 Mbps ICC1, ICC2 3.6 4.9 mA VCC = 2.5 V ± 10%; all channels switching, CL = 15 pF, 50 Mbps 8
Supply current DC, ISO6521 (VI = VCCI; F suffix VI = 0 V) ICC1, ICC2 1.1 2.1 mA VCC = 1.8 V ± 5%; VI = VCCI (ISO6521); VI = 0 V (ISO6521 with F suffix) 9
Supply current DC, ISO6521 (VI = 0 V; F suffix VI = VCCI) ICC1, ICC2 2.1 3.4 mA VCC = 1.8 V ± 5%; VI = 0 V (ISO6521); VI = VCCI (ISO6521 with F suffix) 9
Supply current AC, ISO6521 50 Mbps ICC1, ICC2 3 4.2 mA VCC = 1.8 V ± 5%; all channels switching, CL = 15 pF, 50 Mbps 9
Propagation delay time tPLH, tPHL 11 18 ns VCC = 5 V ± 10%; See Figure 6-1 10
Propagation delay time tPLH, tPHL 12 20.5 ns VCC = 2.5 V ± 10%; See Figure 6-1 11
Propagation delay time tPLH, tPHL 15 25.1 ns VCC = 1.8 V ± 5%; See Figure 7-1 11
Pulse width distortion PWD 0.2 7 ns /tPHL, tPLH/; VCC = 5 V ± 10%; See Figure 6-1 10
Pulse width distortion PWD 0.5 7 ns /tPHL, tPLH/; VCC = 3.3 V ± 10%; See Figure 6-1 10
Pulse width distortion PWD 0.6 7.1 ns /tPHL, tPLH/; VCC = 2.5 V ± 10%; See Figure 6-1 11
Pulse width distortion PWD 0.7 8.2 ns /tPHL, tPLH/; VCC = 1.8 V ± 5%; See Figure 7-1 11

CAD (KiCad official)

  • Symbol: ISO6521FDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: iso6521fdr-etched.step / iso6521fdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso6521fdr.step / iso6521fdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TEXAS INSTRUMENTS datasheet (34 pp, sha256 c55c82616f62bf34, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF