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ISO5451QDWRQ1

Texas Instruments · Isolators - Gate Drivers · SOIC-16-300mil

ISO5451QDWRQ1 from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VEE2 power_in Output negative supply; connect to GND2 for unipolar supply application, and VEE2 is specified at -15 V to 0 V with respect to GND2.
2 DESAT input Desaturation voltage input for IGBT collector-emitter overvoltage detection, rated from GND2 - 0.3 V to VCC2 + 0.3 V.
3 GND2 power_in Gate drive common; connect to the IGBT emitter.
4 NC unconnected Not connected.
5 VCC2 power_in Most positive output supply potential, specified at 15 V to 30 V with respect to GND2.
6 OUT output Gate drive voltage output to the IGBT gate, clamped to VEE2 when the output supply is absent by the active output pull-down.
7 CLAMP output Active Miller clamp output for unipolar supply operation, designed to sink Miller current up to 2 A when the gate voltage is below 2 V.
8 VEE2 power_in Output negative supply; connect to GND2 for unipolar supply application, and VEE2 is specified at -15 V to 0 V with respect to GND2.
9 GND1 power_in Input ground.
10 IN+ input Non-inverting gate drive voltage control input, CMOS-compatible with VIH of 0.7 x VCC1 minimum and VIL of 0.3 x VCC1 maximum.
11 IN- input Inverting gate drive voltage control input, CMOS-compatible with VIH of 0.7 x VCC1 minimum and VIL of 0.3 x VCC1 maximum.
12 RDY output Power-good output, driven high when both input and output supplies are good and low when either side has insufficient supply.
13 FLT output Fault output, low-active during a DESAT condition and latched until reset via RST.
14 RST input Reset input; a low pulse of at least 800 ns clears the fault latch.
15 VCC1 power_in Positive input supply, specified at 3 V to 5.5 V.
16 GND1 power_in Input ground.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: ISO5451QDWRQ1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: iso5451qdwrq1-etched.step / iso5451qdwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso5451qdwrq1.step / iso5451qdwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 9efccfdedc93903f, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF