component
ISO1432DWR
Public Made by Adomby adom
Texas Instruments Isolated RS-485/422 Transceivers, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownISO1432DWR
Texas Instruments · Isolated RS-485/422 Transceivers · SOIC-16-300mil
ISO1432DWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | Logic-side supply; the datasheet specifies VCC1 from 1.71 V to 5.5 V (1.71 V to 1.89 V for 1.8 V operation, 2.25 V to 5.5 V for 2.5 V, 3.3 V and 5 V operation). |
| 2 | GND1 | power_in | Logic-side ground connection for VCC1; pin 2 and pin 8 must both be connected to GND1. |
| 3 | R | output | Receiver output, which drives logic high or low from the bus differential input; the datasheet limits receiver output current to -4 mA to 4 mA. |
| 4 | RE | input | Receiver enable: logic low enables the receiver output, while logic high or an open pin disables it (high impedance). |
| 5 | DE | input | Driver enable: logic high enables the driver outputs, while logic low or an open pin disables them (high impedance). |
| 6 | D | input | Driver data input; the datasheet specifies VIH of 0.7×VCC1 to VCC1 and VIL of 0 to 0.3×VCC1 for this input. |
| 7 | NC | unconnected | No internal connection; device function is unaffected if this pin is tied to a supply or ground on the PCB. |
| 8 | GND1 | power_in | Logic-side ground connection for VCC1; pin 2 and pin 8 must both be connected to GND1. |
| 9 | GND2 | power_in | Bus-side ground connection for VCC2; pin 9 and pin 15 must both be connected to GND2. |
| 10 | NC | unconnected | No internal connection; device function is unaffected if this pin is tied to a supply or ground on the PCB. |
| 11 | Y | output | Driver non-inverting output on the bus side (full-duplex device), driven from D when the driver is enabled. |
| 12 | Z | output | Driver inverting output on the bus side (full-duplex device), driven from D when the driver is enabled. |
| 13 | B | input | Bus-side receiver inverting input; bus pins withstand -7 V to 12 V common-mode voltage with absolute maximum of -18 V to 18 V referenced to GND2. |
| 14 | A | input | Bus-side receiver non-inverting input; bus pins withstand -7 V to 12 V common-mode voltage with absolute maximum of -18 V to 18 V referenced to GND2. |
| 15 | GND2 | power_in | Bus-side ground connection for VCC2; pin 9 and pin 15 must both be connected to GND2. |
| 16 | VCC2 | power_in | Receiver-side (bus-side) supply; the datasheet specifies VCC2 from 3 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16-300mil |
| Category | Signal Isolation Devices |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
ISO1432DWR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
iso1432dwr-etched.step/iso1432dwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);iso1432dwr.step/iso1432dwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
ee0c34ba1cd8865f, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).