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Contents

README

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ISL81487IBZ

RENESAS · Pre-ordered Chips · SOIC-8

ISL81487IBZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output, high if A > B by at least 0.2V, low if A < B by 0.2V or more, and high if A and B are floating; three-state when RE is high.
2 RE input Active-low receiver output enable: RO is enabled when RE is low and high impedance when RE is high (logic levels VIH 2V min, VIL 0.8V max).
3 DE input Driver output enable: driver outputs Y and Z are enabled by bringing DE high and are high impedance when DE is low.
4 DI input Driver input: a low forces Y low and Z high, a high forces Y high and Z low.
5 GND power_in Ground connection.
6 A/Y bidirectional RS-485/422 level noninverting receiver input and noninverting driver output; input (A) if DE = 0, output (Y) if DE = 1, with -8V to +12.5V absolute maximum.
7 B/Z bidirectional RS-485/422 level inverting receiver input and inverting driver output; input (B) if DE = 0, output (Z) if DE = 1, with -8V to +12.5V absolute maximum.
8 VCC power_in System power supply input, 4.5V to 5.5V (7V absolute maximum), with a 0.1µF bypass capacitor shown in the typical circuit.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Driver Differential VOUT (no load) VOD1 5.5 V Full; printed max VCC 4
Driver Differential VOUT (with load) RS-422 VOD2 2 3 V R = 50Ω (RS-422), Figure 1, Full 4
Driver Differential VOUT (with load) RS-485 VOD2 1.5 2.3 5 V R = 27Ω (RS-485), Figure 1, Full 4
Change in Magnitude of Driver Differential VOUT ΔVOD 0.01 0.2 V R = 27Ω or 50Ω, Figure 1, Full 4
Driver Common-Mode VOUT VOC 3 V R = 27Ω or 50Ω, Figure 1, Full 4
Change in Magnitude of Driver Common-Mode VOUT ΔVOC 0.01 0.2 V R = 27Ω or 50Ω, Figure 1, Full 4
Logic Input High Voltage VIH 2 V DE, DI, RE, Full 4
Logic Input Low Voltage VIL 0.8 V DE, DI, RE, Full 4
Logic Input Current IIN1 -2 2 µA DE, DI, RE, Full 4
Input Current A/Y, B/Z IIN2 140 µA DE = 0V, VCC = 4.5 to 5.5V, VIN = 12V, Full 4
Input Current A/Y, B/Z IIN2 -120 µA DE = 0V, VCC = 4.5 to 5.5V, VIN = -7V, Full 4
Input Current A/Y, B/Z IIN2 180 µA DE = 0V, VCC = 0V, VIN = 12V, Full 4
Input Current A/Y, B/Z IIN2 -100 µA DE = 0V, VCC = 0V, VIN = -7V, Full 4
Receiver Differential Threshold Voltage VTH -0.2 0.2 V -7V ≤ VCM ≤ 12V, Full 4
Receiver Input Hysteresis ΔVTH 70 mV VCM = 0V, 25°C 4
Receiver Output High Voltage VOH 3.5 V IO = -4mA, VID = 200mV, Full 4
Receiver Output Low Voltage VOL 0.4 V IO = -4mA, VID = 200mV, Full 4
Three-State Receiver Output Current IOZR 1 µA 0.4V ≤ VO ≤ 2.4V, Full 4
Receiver Input Resistance RIN 96 kΩ -7V ≤ VCM ≤ 12V, ISL81487, Full 5
No-Load Supply Current, DE = VCC ICC 400 500 µA ISL81487, DI, RE = 0V or VCC, DE = VCC, Full 5
No-Load Supply Current, DE = 0V ICC 350 420 µA ISL81487, DI, RE = 0V or VCC, DE = 0V, Full 5
Driver Short-Circuit Current IOSD1 35 250 mA DE = VCC, -7V ≤ VY or VZ ≤ 12V, Note 4, Full 5
Receiver Short-Circuit Current IOSR 7 85 mA 0V ≤ VO ≤ VCC, Full 5
Driver Input to Output Delay tPLH, tPHL 15 24 50 ns RDIFF = 54Ω, CL = 100pF, Figure 2, Full 5
Driver Output Skew tSKEW 2 10 ns RDIFF = 54Ω, CL = 100pF, Figure 2, Full 5
Driver Differential Rise or Fall Time tR, tF 3 12 25 ns RDIFF = 54Ω, CL = 100pF, Figure 2, Full 5
Driver Enable to Output High tZH 14 70 ns CL = 100pF, SW = GND, Figure 3, Full 5
Driver Enable to Output Low tZL 14 70 ns CL = 100pF, SW = VCC, Figure 3, Full 5
Driver Disable from Output High tHZ 44 70 ns CL = 15pF, SW = GND, Figure 3, Full 5
Driver Disable from Output Low tLZ 21 70 ns CL = 15pF, SW = VCC, Figure 3, Full 5
Receiver Input to Output Delay tPLH, tPHL 30 90 150 ns Figure 4, Full 5
Receiver Skew tSKD 5 ns /tPLH - tPHL/, Figure 4, 25°C 5
Receiver Enable to Output High tZH 9 50 ns CL = 15pF, SW = GND, Figure 5, Full 5
Receiver Enable to Output Low tZL 9 50 ns CL = 15pF, SW = VCC, Figure 5, Full 5
Receiver Disable from Output High tHZ 9 50 ns CL = 15pF, SW = GND, Figure 5, Full 5
Receiver Disable from Output Low tLZ 9 50 ns CL = 15pF, SW = VCC, Figure 5, Full 5
Maximum Data Rate fMAX 5 Mbps Full 5
Supply Voltage VCC 4.5 5.5 V VCC = 4.5V to 5.5V 4
Operating Temperature Range -40 85 °C ISL8XXXIX 4
VCC to Ground VCC 7 V 4
Input Voltage DI, DE, RE -0.5 5.5 V -0.5V to (VCC +0.5V) 4
Input/Output Voltage A/Y, B/Z -8 12.5 V 4
Input/Output Voltage RO -0.5 5.5 V -0.5V to (VCC +0.5V) 4
ESD Rating HBM 7 kV Per MIL-STD-883, Method 3015.7, >7kV 4
Maximum Junction Temperature 150 °C Plastic Package 4
Storage Temperature Range -65 150 °C 4
Maximum Lead Temperature 300 °C Soldering 10s, SOIC lead tips only 4
Thermal Resistance Junction to Ambient θJA 170 °C/W 8 Ld SOIC, Note 1 4

CAD (KiCad official)

  • Symbol: ISL81487IBZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: isl81487ibz-etched.step / isl81487ibz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); isl81487ibz.step / isl81487ibz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (14 pp, sha256 dc9cba60715b6841, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF