# ISL80102IRAJZ-T

**RENESAS** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-10(3x3)

ISL80102IRAJZ-T from RENESAS, in a DFN-10(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Output voltage pin; VOUT must be bypassed with at least 10µF X5R/X7R ceramic capacitance for stability, routed with traces no longer than 0.5cm. |
| 2 | VOUT | power_out | Output voltage pin; VOUT must be bypassed with at least 10µF X5R/X7R ceramic capacitance for stability, routed with traces no longer than 0.5cm. |
| 3 | ADJ | input | Feedback pin for externally set VOUT, with a 500mV reference (491mV to 509mV) that sets the output through an external resistor divider. |
| 4 | PG | output | Open-drain power-good flag that goes logic low when VOUT is not in regulation, sinks up to 10mA, must not be pulled up above VIN, and must be grounded if not used. |
| 5 | GND | power_in | Ground pin for the LDO. |
| 6 | SS | passive | Soft-start pin where an external capacitor adjusts inrush current; leave open if not used. |
| 7 | ENABLE | input | VIN-independent chip enable, TTL and CMOS compatible, which must not be left floating and must be tied to VIN if unused. |
| 8 | DNC | unconnected | Do not connect this pin to ground or supply; leave floating. |
| 9 | VIN | power_in | Input supply pin; operating range is 2.2V to 6V, with a minimum 10µF ceramic input capacitor connected to VIN and ground with traces no longer than 0.5cm. |
| 10 | VIN | power_in | Input supply pin; operating range is 2.2V to 6V, with a minimum 10µF ceramic input capacitor connected to VIN and ground with traces no longer than 0.5cm. |
| 11 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | DFN-10(3x3) |
| Category | Power Management (PMIC) |
| Pins | 11 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Output Voltage Accuracy | VOUT | -1.8 |  | 1.8 | % | 2.2V < VIN < 6V; 0A < ILOAD < 3A | 4 |
| Feedback Pin Voltage | VADJ | 491 | 500 | 509 | mV | 0A < ILOAD < full load | 4 |
| DC Input Line Regulation | (VOUT Low Line - VOUT High Line)/VOUT Low Line | -0.4 | 0.1 | 0.4 | % | 2.2V < VIN < 3.6V, VOUT = 1.8V | 4 |
| DC Input Line Regulation | (VOUT Low Line - VOUT High Line)/VOUT Low Line | -0.8 | 0.1 | 0.8 | % | 2.9V < VIN < 6V, VOUT = 2.5V | 4 |
| DC Output Load Regulation (ISL80102) | (VOUT No Load - VOUT High Load)/VOUT No Load | -0.6 | -0.2 | 0.6 | % | ISL80102, 0A < ILOAD < 2A, 2.9V < VIN < 6V; VOUT = 2.5V | 4 |
| Feedback Input Current | IADJ |  | 0.01 | 1 | µA | VADJ = 0.5V | 4 |
| Ground Pin Current | IQ |  | 7.5 | 9 | mA | ILOAD = 0A, VOUT + 0.4V < VIN < 6V, VOUT = 2.5V | 4 |
| Ground Pin Current | IQ |  | 8.5 | 12 | mA | ILOAD = 3A, VOUT + 0.4V < VIN < 6V, VOUT = 2.5V | 4 |
| Ground Pin Current in Shutdown | ISHDN |  | 3.3 | 16 | µA | EN = 0V, VIN = 6V | 4 |
| Dropout Voltage (ISL80102) | VDO |  | 81 | 125 | mV | ISL80102, ILOAD = 2A, VOUT = 2.5V | 5 |
| Dropout Voltage (ISL80102) | VDO |  | 60 | 121 | mV | ISL80102, ILOAD = 2A, VOUT = 5.5V | 5 |
| Enable Threshold Turn-On | VEN(HIGH) | 0.616 | 0.8 | 0.95 | V | 2.2V < VIN < 6V | 5 |
| Enable Threshold Turn-Off | VEN(LOW) | 0.463 |  | 0.6 | V | 2.2V < VIN < 6V | 5 |
| Enable Hysteresis | VEN(HYS) |  | 135 |  | mV | 2.2V < VIN < 6V | 5 |
| Enable Pin Turn-On Delay | tEN |  | 150 |  | µs | COUT = 10µF, ILOAD = 1A | 5 |
| Enable Pin Leakage Current | IEN |  | 1 |  | µA | VIN = 6V, EN = 3V | 5 |
| Soft-Start Charge Current | ICHG | -7 | -4.5 | -2 | µA |  | 5 |
| Reset Pull-Down Resistance | RPD |  | 323 |  | Ω |  | 5 |
| VOUT PG Flag Threshold |  | 75 | 84 | 92 | %VOUT |  | 5 |
| VOUT PG Flag Hysteresis |  |  | 4 |  | % |  | 5 |
| PG Flag Low Voltage |  |  | 47 | 100 | mV | ISINK = 500µA | 5 |
| PG Flag Leakage Current |  |  | 0.05 | 1 | µA | VIN = 6V, PG = 6V | 5 |
| Power Supply Ripple Rejection | PSRR |  | 55 |  | dB | f = 1kHz, ILOAD = 1A; VIN = 2.2V | 5 |
| Power Supply Ripple Rejection | PSRR |  | 62 |  | dB | f = 120Hz, ILOAD = 1A; VIN = 2.2V | 5 |
| Output Noise Voltage |  |  | 49 |  | µVRMS | VIN = 2.2V, VOUT = 1.8V, ILOAD = 3A, BW = 100Hz < f < 100kHz | 5 |
| Output Short-Circuit Current (2A Version) | ISC |  | 2.8 |  | A | ISL80102, VOUT = 0V | 5 |
| Thermal Shutdown Temperature | TSD |  | 160 |  | °C |  | 5 |
| Thermal Shutdown Hysteresis | TSDn |  | 15 |  | °C |  | 5 |
| VIN Relative to GND | VIN | -0.3 |  | 6.5 | V |  | 4 |
| VOUT Relative to GND | VOUT | -0.3 |  | 6.5 | V |  | 4 |
| PG, ENABLE, ADJ, SS Relative to GND |  | -0.3 |  | 6.5 | V |  | 4 |
| Latch-up |  | -100 |  | 100 | mA | Tested per JESD78C, Class 2, Level A; at +85°C | 4 |
| Junction Temperature Range | TJ | -40 |  | 125 | °C |  | 4 |
| VIN Relative to GND | VIN | 2.2 |  | 6 | V |  | 4 |
| VOUT Range (minimum) | VOUT | 800 |  |  | mV |  | 4 |
| VOUT Range (maximum) | VOUT |  |  | 5.5 | V |  | 4 |
| PG, ENABLE, ADJ, SS Relative to GND |  | 0 |  | 6 | V |  | 4 |
| PG Sink Current |  |  |  | 10 | mA |  | 4 |
| Storage Temperature Range | TSTG | -65 |  | 150 | °C |  | 4 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C | Plastic package | 4 |
| Thermal Resistance Junction-to-Ambient | θJA |  | 45 |  | °C/W | 10 Ld 3x3 DFN; free air, high-effective thermal conductivity test board (Notes 5, 6) | 4 |
| Thermal Resistance Junction-to-Case | θJC |  | 4 |  | °C/W | 10 Ld 3x3 DFN (Note 6) | 4 |
| Thermal Resistance Junction-to-Board at Pin 3 | θJB |  | 14.7 |  | °C/W | Note 7 | 4 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | 9, 10 VIN Input supply pin EPAD EPAD must be connected to a copper plane with as | 2 |

## CAD (KiCad official)

- Symbol: `ISL80102IRAJZ-T`
- Footprint: `Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm`
- 3D model: DFN-10(3x3) (KiCad packages3D, STEP)
- 3D model files: `isl80102irajz-t-etched.step` / `isl80102irajz-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `isl80102irajz-t.step` / `isl80102irajz-t.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [RENESAS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600525727909490688) (17 pp, sha256 `66fe8917f8939333`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/isl80102irajz-t-datasheet.pdf)