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ISL68137IRAZ
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RENESAS DC-DC Controllers, UQFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# ISL68137IRAZ++**RENESAS** · DC-DC Controllers · UQFN-48-EP(6x6)++ISL68137IRAZ from RENESAS, in a UQFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PWM0 | output | Pulse width modulation output for phase 0; connect to 3.3V logic compatible smart power stage PWM input. |+| 2 | PWM1 | output | Pulse width modulation output for phase 1; connect to 3.3V logic compatible smart power stage PWM input. |+| 3 | PWM2 | output | Pulse width modulation output for phase 2; connect to 3.3V logic compatible smart power stage PWM input. |+| 4 | PWM3 | output | Pulse width modulation output for phase 3; connect to 3.3V logic compatible smart power stage PWM input. |+| 5 | PWM4 | output | Pulse width modulation output for phase 4; connect to 3.3V logic compatible smart power stage PWM input. |+| 6 | PWM5 | output | Pulse width modulation output for phase 5; connect to 3.3V logic compatible smart power stage PWM input. |+| 7 | PWM6 | output | Pulse width modulation output for phase 6; connect to 3.3V logic compatible smart power stage PWM input. |+| 8 | AVS_CLK | input | AVSBus serial clock input; connect to ground if not used. |+| 9 | AVS_SDA | output | AVSBus serial data output; leave open if not used. |+| 10 | AVS_MDA | input | AVSBus master data input; connect to ground if not used. |+| 11 | AVS_VDDIO | power_in | AVSBus reference voltage input with range 0.90V to 3.63V; leave open if not used. |+| 12 | DNC | unconnected | Do not connect any signals to this pin. |+| 13 | EN0 | input | Active high enable input for Output 0; connect to ground if not used. |+| 14 | EN1 | input | Active high enable input for Output 1; connect to ground if not used. |+| 15 | TWARN | output | Open-drain thermal warning flag output (max pull-up VCC) asserted low on over-temperature sensed at TMON pins. |+| 16 | PG0 | output | Open-drain power-good indicator for Output 0 with maximum pull-up voltage VCC. |+| 17 | PG1 | output | Open-drain power-good indicator for Output 1 with maximum pull-up voltage VCC. |+| 18 | SCL | bidirectional | SMBus serial clock signal pin with maximum pull-up voltage VCC. |+| 19 | SDA | bidirectional | SMBus serial data signal pin with maximum pull-up voltage VCC. |+| 20 | SALRT | output | SMBus serial alert signal pin (open-drain output, max pull-up VCC). |+| 21 | CONFIG | input | Configuration ID selection pin; resistor strap selects active configuration from nonvolatile memory. |+| 22 | VINSEN | input | Input voltage sense pin; connect to VIN through 40.2k/10k resistor divider with 10nF decoupling capacitor. |+| 23 | VSEN1 | input | Positive differential voltage sense input for Output 1; connect to remote sensing point or ground if not used. |+| 24 | RGND1 | input | Negative differential voltage sense input for Output 1; connect to remote sensing point or ground if not used. |+| 25 | CSRTN6 | input | Current sense return for phase 6 forming differential pair with CS6; supports smart power stage, DCR, and resistor sensing. |+| 26 | CS6 | input | Current sense input for phase 6; supports smart power stage, DCR, and resistor sensing. |+| 27 | CSRTN5 | input | Current sense return for phase 5 forming differential pair with CS5; supports smart power stage, DCR, and resistor sensing. |+| 28 | CS5 | input | Current sense input for phase 5; supports smart power stage, DCR, and resistor sensing. |+| 29 | CSRTN4 | input | Current sense return for phase 4 forming differential pair with CS4; supports smart power stage, DCR, and resistor sensing. |+| 30 | CS4 | input | Current sense input for phase 4; supports smart power stage, DCR, and resistor sensing. |+| 31 | CSRTN3 | input | Current sense return for phase 3 forming differential pair with CS3; supports smart power stage, DCR, and resistor sensing. |+| 32 | CS3 | input | Current sense input for phase 3; supports smart power stage, DCR, and resistor sensing. |+| 33 | CSRTN2 | input | Current sense return for phase 2 forming differential pair with CS2; supports smart power stage, DCR, and resistor sensing. |+| 34 | CS2 | input | Current sense input for phase 2; supports smart power stage, DCR, and resistor sensing. |+| 35 | CSRTN1 | input | Current sense return for phase 1 forming differential pair with CS1; supports smart power stage, DCR, and resistor sensing. |+| 36 | CS1 | input | Current sense input for phase 1; supports smart power stage, DCR, and resistor sensing. |+| 37 | CSRTN0 | input | Current sense return for phase 0 forming differential pair with CS0; supports smart power stage, DCR, and resistor sensing. |+| 38 | CS0 | input | Current sense input for phase 0; supports smart power stage, DCR, and resistor sensing. |+| 39 | RGND0 | input | Negative differential voltage sense input for Output 0; connect to remote sensing point or ground if not used. |+| 40 | VSEN0 | input | Positive differential voltage sense input for Output 0; connect to remote sensing point or ground if not used. |+| 41 | SA | input | PMBus slave address selection pin; 1% resistor strap to ground determines device address per Table 2. |+| 42 | VCC | power_in | Chip primary +3.3V supply input; connect with high quality MLCC bypass capacitor. |+| 43 | VCCS | power_out | Internally generated 1.2V LDO logic supply output; decouple with 4.7µF or greater MLCC (X5R or better). |+| 44 | TMON0 | input | Temperature measurement input for Output 0; supports diode-based and smart power stage temperature sensing. |+| 45 | TMON1 | input | Temperature measurement input for Output 1; supports diode-based and smart power stage temperature sensing. |+| 46 | DNC | unconnected | Do not connect any signals to this pin. |+| 47 | DNC | unconnected | Do not connect any signals to this pin. |+| 48 | DNC | unconnected | Do not connect any signals to this pin. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | RENESAS |+| Package | UQFN-48-EP(6x6) |+| Category | Power Supply Chip |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `ISL68137IRAZ`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.4x4.4mm`+- 3D model: UQFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `isl68137iraz-etched.step` / `isl68137iraz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `isl68137iraz.step` / `isl68137iraz.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [RENESAS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588959404930973696) (54 pp, sha256 `d008d93a51c1d32d`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/isl68137iraz-datasheet.pdf)
page.jsonadded+403@@ -0,0 +1,403 @@+{+ "slug": "isl68137iraz",+ "version": "0.1.0",+ "type": "component",+ "description": "RENESAS DC-DC Controllers, UQFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power supply chip",+ "isl68137iraz",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "isl68137iraz.kicad_sym",+ "isl68137iraz.kicad_mod",+ "isl68137iraz.glb",+ "isl68137iraz.step",+ "isl68137iraz.lbr",+ "docs/hero.png",+ "docs/isl68137iraz-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "ISL68137IRAZ",+ "manufacturer": "RENESAS",+ "package": "UQFN-48-EP(6x6)",+ "pin_count": 49,+ "category": "Power Supply Chip",+ "subcategory": "DC-DC Controllers",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588959404930973696",+ "parts": {+ "symbol": "isl68137iraz.kicad_sym",+ "footprint": "isl68137iraz.kicad_mod",+ "model_3d": "isl68137iraz-etched.glb",+ "model_3d_plain": "isl68137iraz.glb",+ "model_3d_step": "isl68137iraz-etched.step",+ "model_3d_step_plain": "isl68137iraz.step",+ "lbr": "isl68137iraz.lbr"+ },+ "distributor_links": {+ "lcsc": "C1019000",+ "digikey": "20-ISL68137IRAZ-ND",+ "mouser": "968-ISL68137IRAZ"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T17:17:49Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "20-ISL68137IRAZ-ND",+ "status": "found",+ "lifecycle": "Obsolete"+ },+ "mouser": {+ "pn": "968-ISL68137IRAZ",+ "status": "found",+ "lifecycle": "Obsolete"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PWM0",+ "type": "output",+ "description": "Pulse width modulation output for phase 0; connect to 3.3V logic compatible smart power stage PWM input."+ },+ {+ "number": "2",+ "name": "PWM1",+ "type": "output",+ "description": "Pulse width modulation output for phase 1; connect to 3.3V logic compatible smart power stage PWM input."+ },+ {+ "number": "3",+ "name": "PWM2",+ "type": "output",+ "description": "Pulse width modulation output for phase 2; connect to 3.3V logic compatible smart power stage PWM input."+ },+ {+ "number": "4",+ "name": "PWM3",+ "type": "output",+ "description": "Pulse width modulation output for phase 3; connect to 3.3V logic compatible smart power stage PWM input."+ },+ {+ "number": "5",+ "name": "PWM4",+ "type": "output",+ "description": "Pulse width modulation output for phase 4; connect to 3.3V logic compatible smart power stage PWM input."+ },+ {+ "number": "6",+ "name": "PWM5",+ "type": "output",+ "description": "Pulse width modulation output for phase 5; connect to 3.3V logic compatible smart power stage PWM input."+ },+ {+ "number": "7",+ "name": "PWM6",+ "type": "output",+ "description": "Pulse width modulation output for phase 6; connect to 3.3V logic compatible smart power stage PWM input."+ },+ {+ "number": "8",+ "name": "AVS_CLK",+ "type": "input",+ "description": "AVSBus serial clock input; connect to ground if not used."+ },+ {+ "number": "9",+ "name": "AVS_SDA",+ "type": "output",+ "description": "AVSBus serial data output; leave open if not used."+ },+ {+ "number": "10",+ "name": "AVS_MDA",+ "type": "input",+ "description": "AVSBus master data input; connect to ground if not used."+ },+ {+ "number": "11",+ "name": "AVS_VDDIO",+ "type": "power_in",+ "description": "AVSBus reference voltage input with range 0.90V to 3.63V; leave open if not used."+ },+ {+ "number": "12",+ "name": "DNC",+ "type": "unconnected",+ "description": "Do not connect any signals to this pin."+ },+ {+ "number": "13",+ "name": "EN0",+ "type": "input",+ "description": "Active high enable input for Output 0; connect to ground if not used."+ },+ {+ "number": "14",+ "name": "EN1",+ "type": "input",+ "description": "Active high enable input for Output 1; connect to ground if not used."+ },+ {+ "number": "15",+ "name": "TWARN",+ "type": "output",+ "description": "Open-drain thermal warning flag output (max pull-up VCC) asserted low on over-temperature sensed at TMON pins."+ },+ {+ "number": "16",+ "name": "PG0",+ "type": "output",+ "description": "Open-drain power-good indicator for Output 0 with maximum pull-up voltage VCC."+ },+ {+ "number": "17",+ "name": "PG1",+ "type": "output",+ "description": "Open-drain power-good indicator for Output 1 with maximum pull-up voltage VCC."+ },+ {+ "number": "18",+ "name": "SCL",+ "type": "bidirectional",+ "description": "SMBus serial clock signal pin with maximum pull-up voltage VCC."+ },+ {+ "number": "19",+ "name": "SDA",+ "type": "bidirectional",+ "description": "SMBus serial data signal pin with maximum pull-up voltage VCC."+ },+ {+ "number": "20",+ "name": "SALRT",+ "type": "output",+ "description": "SMBus serial alert signal pin (open-drain output, max pull-up VCC)."+ },+ {+ "number": "21",+ "name": "CONFIG",+ "type": "input",+ "description": "Configuration ID selection pin; resistor strap selects active configuration from nonvolatile memory."+ },+ {+ "number": "22",+ "name": "VINSEN",+ "type": "input",+ "description": "Input voltage sense pin; connect to VIN through 40.2k/10k resistor divider with 10nF decoupling capacitor."+ },+ {+ "number": "23",+ "name": "VSEN1",+ "type": "input",+ "description": "Positive differential voltage sense input for Output 1; connect to remote sensing point or ground if not used."+ },+ {+ "number": "24",+ "name": "RGND1",+ "type": "input",+ "description": "Negative differential voltage sense input for Output 1; connect to remote sensing point or ground if not used."+ },+ {+ "number": "25",+ "name": "CSRTN6",+ "type": "input",+ "description": "Current sense return for phase 6 forming differential pair with CS6; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "26",+ "name": "CS6",+ "type": "input",+ "description": "Current sense input for phase 6; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "27",+ "name": "CSRTN5",+ "type": "input",+ "description": "Current sense return for phase 5 forming differential pair with CS5; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "28",+ "name": "CS5",+ "type": "input",+ "description": "Current sense input for phase 5; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "29",+ "name": "CSRTN4",+ "type": "input",+ "description": "Current sense return for phase 4 forming differential pair with CS4; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "30",+ "name": "CS4",+ "type": "input",+ "description": "Current sense input for phase 4; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "31",+ "name": "CSRTN3",+ "type": "input",+ "description": "Current sense return for phase 3 forming differential pair with CS3; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "32",+ "name": "CS3",+ "type": "input",+ "description": "Current sense input for phase 3; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "33",+ "name": "CSRTN2",+ "type": "input",+ "description": "Current sense return for phase 2 forming differential pair with CS2; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "34",+ "name": "CS2",+ "type": "input",+ "description": "Current sense input for phase 2; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "35",+ "name": "CSRTN1",+ "type": "input",+ "description": "Current sense return for phase 1 forming differential pair with CS1; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "36",+ "name": "CS1",+ "type": "input",+ "description": "Current sense input for phase 1; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "37",+ "name": "CSRTN0",+ "type": "input",+ "description": "Current sense return for phase 0 forming differential pair with CS0; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "38",+ "name": "CS0",+ "type": "input",+ "description": "Current sense input for phase 0; supports smart power stage, DCR, and resistor sensing."+ },+ {+ "number": "39",+ "name": "RGND0",+ "type": "input",+ "description": "Negative differential voltage sense input for Output 0; connect to remote sensing point or ground if not used."+ },+ {+ "number": "40",+ "name": "VSEN0",+ "type": "input",+ "description": "Positive differential voltage sense input for Output 0; connect to remote sensing point or ground if not used."+ },+ {+ "number": "41",+ "name": "SA",+ "type": "input",+ "description": "PMBus slave address selection pin; 1% resistor strap to ground determines device address per Table 2."+ },+ {+ "number": "42",+ "name": "VCC",+ "type": "power_in",+ "description": "Chip primary +3.3V supply input; connect with high quality MLCC bypass capacitor."+ },+ {+ "number": "43",+ "name": "VCCS",+ "type": "power_out",+ "description": "Internally generated 1.2V LDO logic supply output; decouple with 4.7µF or greater MLCC (X5R or better)."+ },+ {+ "number": "44",+ "name": "TMON0",+ "type": "input",+ "description": "Temperature measurement input for Output 0; supports diode-based and smart power stage temperature sensing."+ },+ {+ "number": "45",+ "name": "TMON1",+ "type": "input",+ "description": "Temperature measurement input for Output 1; supports diode-based and smart power stage temperature sensing."+ },+ {+ "number": "46",+ "name": "DNC",+ "type": "unconnected",+ "description": "Do not connect any signals to this pin."+ },+ {+ "number": "47",+ "name": "DNC",+ "type": "unconnected",+ "description": "Do not connect any signals to this pin."+ },+ {+ "number": "48",+ "name": "DNC",+ "type": "unconnected",+ "description": "Do not connect any signals to this pin."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 54,+ "cost_usd": 0.7387,+ "at": "2026-10-01T17:17:22"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588959404930973696",+ "pages": 54,+ "sha256": "d008d93a51c1d32d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}